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bhyve reviewers group

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Fri, Mar 15

darius.mihaim_gmail.com updated the diff for D19495: bhyve - Snapshot Save and Restore.
  • remove guest memory mapping device that is currently unused. The device was used to make snapshots faster by creating a separate Copy-on-Write mapping of the guest memory. This approach is not useful for guest suspends, and we may be able to avoid exporting it through a device even for snapshots (will be investigating that approach).
  • remove some unused code
Fri, Mar 15, 9:16 AM · bhyve

Sun, Mar 10

yvyz_protonmail.com added a watcher for bhyve: yvyz_protonmail.com.
Sun, Mar 10, 5:52 PM
darius.mihaim_gmail.com added inline comments to D19495: bhyve - Snapshot Save and Restore.
Sun, Mar 10, 10:52 AM · bhyve
darius.mihaim_gmail.com updated the diff for D19495: bhyve - Snapshot Save and Restore.

Fix issues pointed by inline comments

Sun, Mar 10, 10:47 AM · bhyve

Sat, Mar 9

rgrimes added a comment to D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

This appears to be used to deal with a core hang on specific CPU's, we need to see that we have mitigated that in the host, and the decide what the appropriate action here is, I am uncomfortable with just making this silently disappear. Deferning to jhb.

Sat, Mar 9, 7:55 PM · bhyve
jojo_eljojo.net accepted D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

Thanks for the review. Is it possible for me to commit this myself or should someone else do it on my behalf? I have this code in a git branch on GitHub too: https://github.com/freebsd/freebsd/pull/392

Sat, Mar 9, 6:19 PM · bhyve
pmooney_pfmooney.com accepted D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

I think this fix is good for the short term. I can confirm seeing failed writes to that MSR when running a Linux guest on Zen hardware (which were non-fatal to Linux).

Sat, Mar 9, 5:17 PM · bhyve
jojo_eljojo.net added a comment to D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

I think that's a good idea. I would prefer if that was done in a different differential.
I would love to take on the challenge, but it could take me quite a while to implement that.

Sat, Mar 9, 4:29 PM · bhyve
rgrimes added a comment to D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

Though this does fix your issue by silencing the log, it does little to improve the situation. I think what we may want to do is to add yet another option to the bhyve command that along with -w to ignore invalid MSR access to do so silently so that we do not have to add code like this everything a new msr comes into play. John, Patrick your thoughts on this approach?

Sat, Mar 9, 1:44 PM · bhyve
rgrimes added reviewers for D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus: jhb, pmooney_pfmooney.com.
Sat, Mar 9, 1:34 PM · bhyve
jojo_eljojo.net added a reviewer for D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus: rgrimes.
Sat, Mar 9, 4:21 AM · bhyve

Fri, Mar 8

emaste added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 5:15 PM · bhyve
cem added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 3:56 PM · bhyve
emaste added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 2:33 PM · bhyve
dab added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 1:17 PM · bhyve
darius.mihaim_gmail.com updated the test plan for D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 10:20 AM · bhyve
darius.mihaim_gmail.com added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 9:57 AM · bhyve
dab added inline comments to D19495: bhyve - Snapshot Save and Restore.
Fri, Mar 8, 4:57 AM · bhyve
jojo_eljojo.net added a comment to D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.

Hello, this is my first contribution to FreeBSD. I'm sorry if I'm doing something wrong, this is my first time using the system.

Fri, Mar 8, 3:20 AM · bhyve
jojo_eljojo.net created D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus.
Fri, Mar 8, 3:18 AM · bhyve
xistence_0x58.com added a comment to D19495: bhyve - Snapshot Save and Restore.

I have no idea on the internals, but some quick comments as I tried to read the code as-is.

Fri, Mar 8, 1:43 AM · bhyve

Thu, Mar 7

rgrimes accepted D19499: bhyve uart broken for win2016 guest.

I removed a redundant "to" in the description. Patch looks good to me. Copyright over to jhb@

Thu, Mar 7, 8:47 PM · bhyve
rgrimes updated the summary of D19499: bhyve uart broken for win2016 guest.
Thu, Mar 7, 8:46 PM · bhyve
pmooney_pfmooney.com created D19499: bhyve uart broken for win2016 guest.
Thu, Mar 7, 8:42 PM · bhyve
darius.mihaim_gmail.com created D19495: bhyve - Snapshot Save and Restore.
Thu, Mar 7, 4:56 PM · bhyve

Fri, Mar 1

jhb closed D19299: bhyve can miss PIR wake-ups.
Fri, Mar 1, 8:44 PM · bhyve
tychon accepted D19299: bhyve can miss PIR wake-ups.

This looks great and addresses my concern from an earlier iteration. Thanks for fixing it!

Fri, Mar 1, 1:40 AM · bhyve

Thu, Feb 28

jhb added inline comments to D19299: bhyve can miss PIR wake-ups.
Thu, Feb 28, 10:36 PM · bhyve
pmooney_pfmooney.com added a comment to D19299: bhyve can miss PIR wake-ups.

Yes, he was concerned about my use of the reserved bits. For a VMX-only case, it was probably fine, but if we ever want PCI-passthru to post interrupts directly to the guest, we'll need those bits. The write-up for OS-7354, which switched to the separate pending_prio field, covers the reasoning.

Thu, Feb 28, 5:54 PM · bhyve
jhb accepted D19299: bhyve can miss PIR wake-ups.

I recall seeing the earlier version of this before and approving it only to then have Tycho point out an issue I had failed to notice. I spent some time yesterday searching around in my MUA but couldn't find the thread. :-/ I think the issue you fixed from the bug you noted about not using the reserved PIR bits for the bitmask was the thing he had mentioned, I just wish I could confirm that for sure.

Thu, Feb 28, 5:50 PM · bhyve

Wed, Feb 27

pmooney_pfmooney.com added a comment to D19299: bhyve can miss PIR wake-ups.

We do, in a sense, clear those bits on interrupt delivering since it involves clearing the pending bit, meaning the next 0 -> 1 transition would incur a clean of pending_prio. Clearing the lower bits in pending_prio as part of vmx_pending_intr carries no risk of incurring extra work, since interrupt notification is triggered from having an incoming prio greater than what is cached in pending_prio. Besides, spurious wake-ups from the HLT loop to check for interrupts are much preferred to missing one.

Wed, Feb 27, 9:23 PM · bhyve
jhb added a comment to D19299: bhyve can miss PIR wake-ups.

Hmm, I guess it would be expensive to clear the bits from pending_prio when interrupts are actually delivered? And/or we can't tell when that is when PIR is in use? The only thing that slightly worries me is if the last hunk throws away too much data by clearing all the bits except for prio_bit rather than only clearing higher bits. I guess even if there are still lower priority bits pending, we don't need to worry about sending a notification. When the vCPU lowers it's TPR that will then notice and handle those interrupts without 'pending_prio' being involved.

Wed, Feb 27, 9:08 PM · bhyve
rgrimes accepted D19299: bhyve can miss PIR wake-ups.
Wed, Feb 27, 9:01 PM · bhyve
pmooney_pfmooney.com updated the diff for D19299: bhyve can miss PIR wake-ups.

Fixed copyright attribution per Rod's comment.

Wed, Feb 27, 8:46 PM · bhyve
rgrimes added inline comments to D19299: bhyve can miss PIR wake-ups.
Wed, Feb 27, 8:42 PM · bhyve
pmooney_pfmooney.com updated the diff for D19299: bhyve can miss PIR wake-ups.

Updated diff to include full context

Wed, Feb 27, 8:40 PM · bhyve
pmooney_pfmooney.com added inline comments to D19299: bhyve can miss PIR wake-ups.
Wed, Feb 27, 8:38 PM · bhyve

Sat, Feb 23

imp added inline comments to D19299: bhyve can miss PIR wake-ups.
Sat, Feb 23, 6:31 AM · bhyve

Fri, Feb 22

pmooney_pfmooney.com added a comment to D19299: bhyve can miss PIR wake-ups.

I used git format-patch assuming phabricator would pick up on the context stuff, but apparently not. I'll be sure to increase the context for the next revision.

Fri, Feb 22, 11:27 PM · bhyve
rgrimes added a comment to D19299: bhyve can miss PIR wake-ups.

In the future it helps to upload full file diffs, not sure what vcs your using or what its command is, for svn I use svn diff -x U999999.

Fri, Feb 22, 10:53 PM · bhyve
pmooney_pfmooney.com created D19299: bhyve can miss PIR wake-ups.
Fri, Feb 22, 10:33 PM · bhyve
araujo removed a member for bhyve: araujo.
Fri, Feb 22, 1:26 AM
araujo removed a reviewer for D18831: Increase bhyve BLOCKIF_IOV_MAX and VTBLK_RINGSZ to 128 to support modern Windows guests: araujo.
Fri, Feb 22, 1:23 AM · bhyve

Jan 28 2019

callum_callumaitchison.uk updated the diff for D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units.

Changes made as suggested by previous comments

Jan 28 2019, 7:35 PM · bhyve
rgrimes added inline comments to D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units.
Jan 28 2019, 5:51 PM · bhyve
callum_callumaitchison.uk added a comment to D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units.

Question regarding comments

Jan 28 2019, 3:43 PM · bhyve
rgrimes added a comment to D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units.

Overall good, just style nits and a diff reduction.

Jan 28 2019, 12:35 PM · bhyve
rgrimes added reviewers for D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units: jhb, tychon, pmooney_pfmooney.com.
Jan 28 2019, 12:16 PM · bhyve
callum_callumaitchison.uk created D19001: Bhyve VT-d IOMMU: Support capability detection for multiple translation units.
Jan 28 2019, 12:06 PM · bhyve

Jan 25 2019

dch added a watcher for bhyve: dch.
Jan 25 2019, 11:21 AM