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Nov 2 2023, 1:14 PM (23 w, 4 d)

Recent Activity

Mar 4 2024

himanshu_thechauhan.dev added a watcher for bhyve: himanshu_thechauhan.dev.
Mar 4 2024, 2:56 PM

Feb 12 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Reworked APLIC_IDC_REG as asked

Feb 12 2024, 10:43 AM · riscv

Feb 3 2024

himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Feb 3 2024, 9:54 AM · riscv

Feb 1 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Sorry for the mess up in versions in comments. Last patch was v9, as per my local branches. This one is v10.

Feb 1 2024, 3:42 PM · riscv
himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.
Feb 1 2024, 11:12 AM · riscv
himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Changes in v10:

  • Save hart indices from FDT and use them to create target value
Feb 1 2024, 11:07 AM · riscv

Jan 28 2024

himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

ping.

Jan 28 2024, 3:50 AM · riscv

Jan 25 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

After Convert local interrupt controller to a newbus PIC, commit rebase is required.

Jan 25 2024, 10:09 AM · riscv

Jan 23 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Changes in v7:

  • Keep per-cpu IDC offsets after reading interrupts-extended property
  • Accessing IDC is via the stored per-CPU IDC offsets
  • Remove cleanup after failure in *_attach function (like other drivers)
  • Added aplic.c in files.riscv alphabetically
Jan 23 2024, 2:42 PM · riscv
himanshu_thechauhan.dev added a comment to D40474: intrng: call pic_init_secondary on all registered PICs.

Whilst this looks like the right thing to do for the core framework, I believe our GICv2 driver won't like this in some edge cases, as for the FDT case it supports being a non-root PIC yet has an arm_gic_init_secondary which currently only runs for the root PIC, probably by design?

You want to have if (dev != intr_irq_root_dev) return; added to arm_gic_init_secondary() as part of this? I don't have any way to test this.

sys/arm/mv/mpic.c overrides it and isn't a root PIC, but the implementation is empty so that's harmless.

In fact D40475 is to remove this.

This will iterate in the reverse order in which the PICs were registered (since they're inserted at the head), which is probably the exact opposite of what you want, and not the current behaviour for GICv3, but that may or may not matter in that specific case.

I'm aware. This could be addressed by changing pic_list to a STAILQ, but the single instance where this was needed it doesn't matter. The (non-root!) PIC in question needs per-processor initialization soon after each processor starts, and doesn't care whether the root PIC has been initialized or not. Given this it seemed best to leave this alone until something came along which did care (or a reviewer decides this is important).

Jan 23 2024, 9:15 AM
himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

@jrtc27 Thanks for your review! I have taken care of your comments. Patch will follow shortly.

Unless I'm mistaken you still use the hartid to index the APLIC, not the APLIC's hart indexes. You need to actually record, and later use, the index <-> cpu mapping when iterating over interrupts-extended.

Jan 23 2024, 9:04 AM · riscv

Jan 20 2024

himanshu_thechauhan.dev added inline comments to D35901: riscv: Convert local interrupt controller to a newbus PIC.
Jan 20 2024, 8:56 AM

Jan 19 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Changes in v6:

  • Added verification of harts that can take interrupt using "interrupts-extended" property of FDT.
  • Added target_cpu cpuset which contains the bit map of logical cpus that can take interrupts.
  • During binding of the irqs, the cpus from target_cpu cpuset is used.
  • Handled failure case and deregister ircs.
  • Took care of comments regarding the brackets.
  • Added a macro APLIC_IDC to give offset of a given hart.
  • Removed return of FILTER_STRAY when IRQ is 0, added a KASSERT instead.
  • Use of DEFINE_CLASS_0
Jan 19 2024, 12:02 PM · riscv
himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

@jrtc27 Thanks for your review! I have taken care of your comments. Patch will follow shortly.

Jan 19 2024, 11:17 AM · riscv

Jan 17 2024

himanshu_thechauhan.dev added a comment to D35901: riscv: Convert local interrupt controller to a newbus PIC.

I was trying to rebase and adapt my IMSIC patch to this one.
But the patch doesn't apply cleanly. I am using main branch of FreeBSD 15.0-CURRENT (at commit id 6caa19a08b8).

Jan 17 2024, 1:31 PM
himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

@mhorne That's great! Thanks for all your time and guidance! I really appreciate it!

Jan 17 2024, 8:59 AM · riscv

Jan 16 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

changes in v6:

  • Fixed wrong sizing of isrcs
  • Fixed indentation of goto label
Jan 16 2024, 10:20 AM · riscv
himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 16 2024, 10:11 AM · riscv

Jan 14 2024

himanshu_thechauhan.dev updated the test plan for D43452: [RFC] riscv: Introduce support for Incoming MSI Controller (IMSIC).
Jan 14 2024, 8:35 AM · riscv
himanshu_thechauhan.dev requested review of D43452: [RFC] riscv: Introduce support for Incoming MSI Controller (IMSIC).
Jan 14 2024, 6:40 AM · riscv

Jan 10 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Changes in v5:

  • Use hartid instead of logical cpu when programming APLIC registers
  • Add defines for some hard coded numbers
  • Check for "msi-parent" property during attach and fail if found
  • Removed the IDC structure and added defines for the IDC register offsets and calculations
  • Removed reuse of local variables
  • Removed unused function and structures
  • Removed "all rights reserved" from copyright comment
  • Removed ambiguity of cpu vs hartid
Jan 10 2024, 1:56 PM · riscv
himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

@mhorne Thanks for the review! I have taken care of your comments. Will be posting new patch shortly.

Jan 10 2024, 1:38 PM · riscv

Jan 6 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

v4

  • Fixed bug
    • Uniprocessor boot used to hang.
    • Now it is tested from 1 CPU to 16 CPUs
    • virtio block dev is tested
    • virtionet is tested
Jan 6 2024, 5:32 PM · riscv

Jan 4 2024

himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

v3 changes:

  • Removed duplicated defines
  • Added comments to some of the structures and defines
  • Cosmetic changes.
Jan 4 2024, 3:38 PM · riscv
himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 4 2024, 11:25 AM · riscv
himanshu_thechauhan.dev updated the diff for D43293: RISCV: Introduce support for APLIC interrupt controller.

Took care of formatting and other comments.

Jan 4 2024, 6:37 AM · riscv
himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 4 2024, 3:45 AM · riscv
himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 4 2024, 3:38 AM · riscv

Jan 3 2024

himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

I have a related series ending in https://reviews.freebsd.org/D35901 to get back to that should make having direct and IMSIC APLIC support less messy due to changing what the root PIC is. That shouldn’t block this patch as it’s (presumably) just similar tweaks to the normal PLIC, but for IMSIC support it’s probably worth me pushing forward on that before you get too far with it?

Jan 3 2024, 4:47 PM · riscv
himanshu_thechauhan.dev added inline comments to D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 3 2024, 4:41 PM · riscv
himanshu_thechauhan.dev added a comment to D43293: RISCV: Introduce support for APLIC interrupt controller.

Time to teach my emacs the style(9) KNF. I will take care of these suggestions. Thanks!

Jan 3 2024, 4:10 PM · riscv
himanshu_thechauhan.dev added a reviewer for D43293: RISCV: Introduce support for APLIC interrupt controller: mhorne.
Jan 3 2024, 10:15 AM · riscv
himanshu_thechauhan.dev requested review of D43293: RISCV: Introduce support for APLIC interrupt controller.
Jan 3 2024, 10:13 AM · riscv
himanshu_thechauhan.dev added a watcher for riscv: himanshu_thechauhan.dev.
Jan 3 2024, 8:34 AM