riscv: Introduce support for Incoming MSI Controller (IMSIC)
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Authored by himanshu_thechauhan.dev on Jan 14 2024, 6:40 AM.

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Reviewers

mhorne
jrtc27
br

Summary

This patch adds support for IMSIC on RISCV architecture.
The following features are supported:

Interrupt delivery with aplic-imsic
Sending IPIs between HARTS without ecall
IPIs are sent IMSIC-to-IMSIC

Whats not supported:

MSI interrupts from devices.

MSI chosen for IPI is 1 as it has the highest priority.

IPIs over IMSIC can be disabled by "aia.imsic.ipi_disabled=1" kernel parameter.

Test Plan

Tested SMP boot with aplic-imsic and aplic-only.
Tested from 1 CPU to 16 CPUs

Diff Detail

Repository

rG FreeBSD src repository

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Event Timeline

himanshu_thechauhan.dev created this revision.Jan 14 2024, 6:40 AM

Herald added subscribers: riscv, imp. · View Herald TranscriptJan 14 2024, 6:40 AM

himanshu_thechauhan.dev requested review of this revision.Jan 14 2024, 6:40 AM

himanshu_thechauhan.dev edited the test plan for this revision. (Show Details)Jan 14 2024, 8:35 AM

mhorne mentioned this in D35899: intrng: Allow alternative IPI PICs to be registered and used.Jan 22 2024, 4:51 PM

mmel mentioned this in D40474: intrng: call pic_init_secondary on all registered PICs.Jan 23 2024, 8:17 AM

Hi Himanshu what is status of this? could you regenerate for the latest HEAD ?

In D43452#1055467, @br wrote:

Hi Himanshu what is status of this? could you regenerate for the latest HEAD ?

Hi Ruslan,

This patch (and the latest one I have) depend on D40474 for the correct ordering of initialisation. Do we have any idea on how to close D40474?
I can generate the patch on current HEAD, no problem.

himanshu_thechauhan.dev retitled this revision from [RFC] riscv: Introduce support for Incoming MSI Controller (IMSIC) to riscv: Introduce support for Incoming MSI Controller (IMSIC).Mon, Dec 23, 5:50 PM

himanshu_thechauhan.dev edited the summary of this revision. (Show Details)

himanshu_thechauhan.dev edited the test plan for this revision. (Show Details)