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- May 10 2014, 2:21 PM (626 w, 3 d)
Yesterday
This can be closed? It's been merged into th re-opened D55492
Fri, May 8
Tue, May 5
Thu, Apr 30
Wed, Apr 29
Tue, Apr 28
Mon, Apr 27
Thu, Apr 23
It looks like the two capability registers this change affects are elr_el1 and vbar_el1. Both of these have at least 128 bits of space before the next register, so storage shouldn't be a problem for Morello.
I think we can split out the pmap and busdma parts into 2 new revisions (i.e. one for pmap, one for busdma)
Wed, Apr 22
Tue, Apr 21
We will need to handle accessing different sized registers to support FEAT_D128, e.g. VTTBR_EL2 will be 128 bit there.
I can move them to something like 200/201. I think the Arm Permission Overlay Extension (FEAT_S1POE) could then reuse SEGV_PKUERR as it is similar.
Mon, Apr 20
Thu, Apr 16
Stop switching sctlr user bits for kernel threads
Was it decided if this was an acceptable approach? I found the sanitizer runtimes also need this to work correctly, so would like to push to fix them
Does anyone have any more testing they would like to do, or shall I push this to main?
Wed, Apr 15
Tue, Apr 14
Change the SEGV_MTE* values
Mon, Apr 13
Update comments
Apr 13 2026
Committed in rGf54209510b1b30b1445792db7d33401f7c7a97d6 with the wrong tag
Apr 10 2026
Update after D56306 changes
Remove per-cpu pointers
Set TESTSDIR to install the Kyuafile in the correct place
I'm not sure how that can happen as by including bsd.test.mk a Kyuafile should be created, e.g.
$ cat /usr/obj/.../amd64.amd64/tests/sys/arch/Kyuafile -- Automatically generated by bsd.test.mk.
Apr 9 2026
Move to Makefile.inc
