User Details
User Details
- User Since
- May 10 2014, 2:21 PM (532 w, 6 d)
Yesterday
Yesterday
andrew added a comment to D46149: buf_ring: Support DEBUG_BUFRING in userspace.
The mtx code appears to be a check that the correct mutex is being held by the kernel so only one thread can access the single-consumer functions at a time. In userspace the tests I wrote don't use a mutex as only one consumer thread is created when testing these functions.
andrew requested review of D46159: arm64: Expand the use of Armv8.1-A atomics.
andrew requested review of D46158: buf_ring: Add a threaded test.
andrew requested review of D46157: buf_ring: Add an Arm copyright.
andrew requested review of D46156: tests: Add buf_ring overflow checks.
andrew requested review of D46155: buf_ring: Ensure correct ordering of loads.
andrew requested review of D46154: buf_ring: Use atomic operations with br_prod_tail.
andrew requested review of D46153: buf_ring: Remove old arm-only dequeue code.
andrew requested review of D46152: buf_ring: Use atomic operations with br_cons_tail.
andrew requested review of D46151: buf_ring: Keep the full head and tail values.
andrew requested review of D46150: buf_ring: Consistently use atomic_*_32.
andrew requested review of D46149: buf_ring: Support DEBUG_BUFRING in userspace.
andrew requested review of D46148: buf_ring: Remove PREFETCH_DEFINED.
andrew requested review of D46147: tests: Add a buf_ring test.
Wed, Jul 24
Wed, Jul 24
We don't use the vPE table so it's safe to ignore.
Tue, Jul 23
Tue, Jul 23
andrew added a comment to D46060: ELF auxargs: reserve a slot for CheriABI use.
It looks like HardenedBSD uses #define AT_PAXFLAGS 35. I assume they stopped merging changes to this list as they didn't have AT_USRSTACK* in their copy of this file.
andrew requested review of D46087: arm64: Boot into VHE mode when able.
andrew requested review of D46085: arm64/vmm: Allow vmm when in VHE.
andrew requested review of D46086: arm64: Remove the E2H check from has_hyp.
andrew requested review of D46084: arm64/vmm: Convert the handlers into ifuncs.
andrew requested review of D46083: arm64/vmm: Add the VHE exception and switcher files.
andrew requested review of D46082: arm64/vmm: Hide non-VHE exception code from VHE.
andrew requested review of D46081: arm64/vmm: Update exception vectors around a guest.
andrew requested review of D46080: arm64/vmm: Support tlbi from VHE.
andrew requested review of D46079: arm64/vmm: Only store the guest par_el1.
andrew requested review of D46077: arm64/vmm: Restore hcr_el2 earlier.
andrew requested review of D46078: arm64/vmm: Teach the switcher about new registers.
andrew requested review of D46076: arm64/vmm: Teach vmm_arm.c about VHE.
andrew requested review of D46075: arm64/vmm: Create functions to call into EL2.
andrew requested review of D46074: arm64/vmm: Teach the vtimer about VHE.
andrew requested review of D46073: arm64/vmm: Move nVHE-only code to the new file.
andrew requested review of D46072: arm64/vmm: Start to extract code not needed by VHE.
andrew requested review of D46071: arm64: Add counter timer registers to armreg.h.
andrew committed rG9840598aa31f: dev/uart: Add APMC0D08 as found in the Intel E2100 (authored by andrew).
dev/uart: Add APMC0D08 as found in the Intel E2100
andrew committed rG034c83fd7d85: arm64: Ensure sctlr and pstate are in known states (authored by andrew).
arm64: Ensure sctlr and pstate are in known states
arm64: Fix the gicv3 check in locore.S
arm64: Support counter access with E2H
arm64: Add EL1 and EL12 register alt names
Wed, Jul 17
Wed, Jul 17
Mon, Jul 15
Mon, Jul 15
arm64: Add the TCR_EL2.PS mask
arm64: Disable outling atomics
dev/psci: Check all compat strings
arm64: Disable outling atomics
binmiscctl.8: Change the example to armv7
andrew committed rG833ccd66dac6: cdefs: Add __writeonly to mark write only vars (authored by andrew).
cdefs: Add __writeonly to mark write only vars
ibcore: Mark write-only variables
arm64: Fix indentation to be consistent
stats: Fix the build under gcc
andrew committed rG2b2c134337ff: arm64: add PMBSR_MSS_{BSC,FSC} status code field (authored by zachary.leaf_arm.com).
arm64: add PMBSR_MSS_{BSC,FSC} status code field
sys: Build arm64 per-thread SSP with GCC
dev/hwpmc: Fix the dmc620 MD4 macro
andrew committed rGd8a9e188f279: arm64: make SPE regs use ALT_NAME macro (authored by zachary.leaf_arm.com).
arm64: make SPE regs use ALT_NAME macro
pci: Fix pci_host_generic_acpi with gcc
arm64/rockchip: Fix the build with GCC
andrew committed rG2d72da2720db: arm64: Add the pointer auth registers to armreg.h (authored by andrew).
arm64: Add the pointer auth registers to armreg.h
arm64: Use the pointer auth register defines
sys/sys: Fix __builtin_is_aligned fallback
arm64: Use the UL macro in TCR_EL1 defines
csu: Find the main pointer through the GOT
andrew committed rG21f3f3e87edd: stand/kboot: Fix the linker script OUTPUT_FORMAT (authored by andrew).
stand/kboot: Fix the linker script OUTPUT_FORMAT
andrew committed rG2bd50014977a: stand/efi: Fix for binutils when targeting arm64 (authored by andrew).
stand/efi: Fix for binutils when targeting arm64
andrew committed rG25eae8989139: arm: Add a missing interrupt to the generic timer (authored by andrew).
arm: Add a missing interrupt to the generic timer
andrew committed rG09a830be9485: arm64: Add MRS_REG_ALT_NAME ID register macros (authored by andrew).
arm64: Add MRS_REG_ALT_NAME ID register macros
andrew committed rGdd701489c80c: arm64: Use the _REG macros to read ID registers (authored by andrew).
arm64: Use the _REG macros to read ID registers
andrew committed rG2f54bff74a4b: arm64/gicv3: Check if the hardware supports LPIs (authored by andrew).
arm64/gicv3: Check if the hardware supports LPIs
andrew committed rGc2e0dea93f71: rtld: Add MD_OBJ_ENTRY to extend Struct_Obj_Entry (authored by andrew).
rtld: Add MD_OBJ_ENTRY to extend Struct_Obj_Entry
dev/psci: Check all compat strings
andrew committed rG27e9c833bb8f: arm64: Add EL1 hardware breakpoint exceptions (authored by andrew).
arm64: Add EL1 hardware breakpoint exceptions
andrew committed rG5909ac43709a: am64: Allow cpu.h to be included from assembly (authored by andrew).
am64: Allow cpu.h to be included from assembly
elf_common.h: Add STO_AARCH64_VARIANT_PCS
andrew committed rGcf5be947352b: arm64: Use a switch to decide when to enable debug (authored by andrew).
arm64: Use a switch to decide when to enable debug
andrew committed rG64b0acf87c97: arm64: Mask non-debug exceptions when single stepping (authored by andrew).
arm64: Mask non-debug exceptions when single stepping
andrew committed rGc3d86d27c3aa: arm64: Always set the debug control and value regs (authored by andrew).
arm64: Always set the debug control and value regs
arm64: Rename drop_to_el1 to enter_kernel_el
arm64: Return all registers to gdb when able
andrew committed rG526ad0a15765: arm64: Add TF_LR, it will be used by bhyve asm (authored by andrew).
arm64: Add TF_LR, it will be used by bhyve asm
andrew committed rGc7c27e9ebfdb: arm64: Add a macro to find a VM fault address (authored by andrew).
arm64: Add a macro to find a VM fault address
andrew committed rG0ea3e76c4bae: arm64: Add ISS_MSR_REG for ESR_ELx.ISS values (authored by andrew).
arm64: Add ISS_MSR_REG for ESR_ELx.ISS values
arm64: Add CurrentEL register definitions
andrew committed rGc9dc783efbab: aarch64: fix branch target indications in arm64cpuid.pl and keccak1600 (authored by Tom Cosgrove <tom.cosgrove@arm.com>).
aarch64: fix branch target indications in arm64cpuid.pl and keccak1600
ossl: Rebuild the openssl asm
arm64: Add more spsr_el1 register values
andrew committed rGc06a19447954: aarch64: support BTI and pointer authentication in assembly (authored by Russ Butler <russ.butler@arm.com>).
aarch64: support BTI and pointer authentication in assembly
binmiscctl.8: Change the example to armv7
ibcore: Mark write-only variables
andrew committed rG066069197864: cdefs: Add __writeonly to mark write only vars (authored by andrew).
cdefs: Add __writeonly to mark write only vars
arm64: Fix indentation to be consistent
sys: Build arm64 per-thread SSP with GCC
stats: Fix the build under gcc
andrew committed rG3414984c3aff: arm64: add PMBSR_MSS_{BSC,FSC} status code field (authored by zachary.leaf_arm.com).
arm64: add PMBSR_MSS_{BSC,FSC} status code field
andrew committed rG750fbcc0603f: arm64: make SPE regs use ALT_NAME macro (authored by zachary.leaf_arm.com).
arm64: make SPE regs use ALT_NAME macro
pci: Fix pci_host_generic_acpi with gcc