- User Since
- May 10 2014, 2:21 PM (275 w, 1 d)
Wed, Aug 14
Tue, Aug 13
You can use __FreeBSD_version to toggle the non-xdma case. It looks like 1200020 is the first bump after xdma was added so you'd have:
#if __FreeBSD_version >= 1200020 /* XDMA code */ #else /* Pre-XDMA code */ #endif
Fri, Aug 9
Correct the man page, addr points at a struct iovec.
Add COMPAT32 and update the man page
Thu, Aug 8
Is there a reasion you're not using the xdma framework?
Wed, Aug 7
Mon, Aug 5
Hasn't this opened a raise between promotion/demotion and pmap_kextract? pmap_kextract walks the page table so may find a zero entry from the break-before-make sequence.
Fri, Aug 2
Wed, Jul 31
Fri, Jul 26
Tue, Jul 23
Jul 18 2019
Jul 17 2019
- Fix the mane of ID_AA64MMFR0_PARange_1T
- Restore ID_AA64PFR0_GIC_BITS
Jul 11 2019
Jul 8 2019
My guess is we are hitting the crossing point where the instruction cost of the loop is greater than the cost of invalidating the entire instruction cache. We might need to have an invalidate all version of arm64_icache_sync_range then switch between them in the macro based on the length of the memory.
Jul 4 2019
Jun 26 2019
I'm happy with the arm and arm64 changes.
Isn't this also a problem on amd64?
Jun 16 2019
Jun 12 2019
Jun 11 2019
The size was set so a 32 bit tracing tool can trace a 64 bit kernel without loosing information.
May 31 2019
May 30 2019
How frequently is srat_resolve_its_pxm called?
May 29 2019
May 28 2019
May 27 2019
May 26 2019
May 22 2019
Having thought about it more I'm not sure this is correct. I think we should make the default case VM_MEMATTR_DEVICE. EFI_MD_ATTR_WC Is also wrong as it should be VM_MEMATTR_UNCACHEABLE so should be fixed at some stage.
May 9 2019
I also return the size when the base is NULL in PT_GETREGSET.
- Remove xsave. It will move to a new review.
- Add PT_SETREGSET
- Use goto out for error handling
- Remove sys/_iovec.h from sys/ptrace.h
May 8 2019
May 7 2019
May 4 2019
May 3 2019
May 2 2019
May 1 2019
Move loading x18 before we use it.
How does this work in a big.LITTLE SoC?
Apr 25 2019
Apr 16 2019
If you think more flags will be needed later you can make it a u_int with a per-flag macro. If not just make it a bool.
Apr 13 2019
I'm happy with the quirk, however I'm not sure about the PCI part. It may pay to split that out into a new review as there are two independent changes in this.
Apr 10 2019
Do we need something similar to intr_pic_init_secondary to also disable the timers on non-boot CPUs?
Apr 6 2019
Apr 5 2019
Apr 3 2019
Apr 2 2019
From looking at the Linux PL011 driver it seems registers always start on a 32b boundary so *shiftp should always be 2. The simplest would be to add a quirk to the PL011 acpi_uart_compat_data entries to force a shift of 2. It would also be cleaner than checking for specific interface types in what should become machine independent code. Later on we may be able to use cd_regshft and cd_regiowidth to override the SPCR details, however it looks like the ns8250 driver may need some careful clean up first.
Mar 29 2019
I wonder if there is a way to make this generic as the dprintf or similar macro seems to be common in arm code.
Mar 28 2019
Mar 25 2019
Mar 21 2019
Mar 8 2019
Could you use spcr->SerialPort.AccessWidth to find this? It's set to 1 in the copy of the spcr table I have indicating byte access.
Mar 7 2019
I'm fine with breaking from the ABI in the kernel & modules as long as it's just for optimisation and we don't require the breakage to allow the kernel to still work after being built with, for example, gcc & linked with bfd.
Mar 3 2019
Feb 28 2019
Split out the header
Enable clocks, etc
Feb 27 2019
Feb 25 2019
Is there a reason to limit this to arm and arm64?