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mhorne (Mitchell Horne)
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Mar 22 2019, 4:46 AM (34 w, 3 d)

Recent Activity

Sat, Nov 16

mhorne committed rS354765: RISC-V: busdma_bounce: fix BUS_DMA_ALLOCNOW for non-paged aligned sizes.
RISC-V: busdma_bounce: fix BUS_DMA_ALLOCNOW for non-paged aligned sizes
Sat, Nov 16, 1:26 AM

Fri, Nov 15

mhorne added a comment to D21928: plic: support irq distribution.

@br thanks for your help and patience in reviewing these PLIC changes. I learned a lot while writing them!

Fri, Nov 15, 3:42 AM
mhorne committed rS354722: RISC-V: Print SBI info at startup.
RISC-V: Print SBI info at startup
Fri, Nov 15, 3:40 AM
mhorne closed D22327: RISC-V: Print SBI info at startup.
Fri, Nov 15, 3:40 AM
mhorne committed rS354721: Add missing files from r354720.
Add missing files from r354720
Fri, Nov 15, 3:38 AM
mhorne committed rS354720: RISC-V: add support for SBI spec v0.2.
RISC-V: add support for SBI spec v0.2
Fri, Nov 15, 3:34 AM
mhorne closed D22326: RISC-V: add support for SBI spec v0.2.
Fri, Nov 15, 3:34 AM
mhorne committed rS354719: RISC-V: pass arg6 in sbi_call.
RISC-V: pass arg6 in sbi_call
Fri, Nov 15, 3:22 AM
mhorne closed D22325: RISC-V: pass arg6 in sbi_call.
Fri, Nov 15, 3:22 AM
mhorne committed rS354718: plic: support irq distribution.
plic: support irq distribution
Fri, Nov 15, 3:18 AM
mhorne closed D21928: plic: support irq distribution.
Fri, Nov 15, 3:18 AM
mhorne committed rS354717: plic: fix context calculation.
plic: fix context calculation
Fri, Nov 15, 3:15 AM
mhorne closed D21927: plic: fix context calculation.
Fri, Nov 15, 3:15 AM

Wed, Nov 13

mhorne added inline comments to D22327: RISC-V: Print SBI info at startup.
Wed, Nov 13, 2:51 AM
mhorne updated the diff for D22327: RISC-V: Print SBI info at startup.

Address comments.

Wed, Nov 13, 2:48 AM
mhorne updated the diff for D22326: RISC-V: add support for SBI spec v0.2.

Fix sbi_console_getchar.

Wed, Nov 13, 2:45 AM
mhorne abandoned D22343: Test Plan:.

I hate arc sometimes.

Wed, Nov 13, 2:44 AM
mhorne created D22343: Test Plan:.
Wed, Nov 13, 2:43 AM

Tue, Nov 12

mhorne updated the test plan for D22327: RISC-V: Print SBI info at startup.
Tue, Nov 12, 4:57 AM
mhorne created D22327: RISC-V: Print SBI info at startup.
Tue, Nov 12, 4:53 AM
mhorne created D22326: RISC-V: add support for SBI spec v0.2.
Tue, Nov 12, 4:50 AM
mhorne created D22325: RISC-V: pass arg6 in sbi_call.
Tue, Nov 12, 4:45 AM
mhorne retitled D21928: plic: support irq distribution from plic: improve enable bit handling to plic: support irq distribution.
Tue, Nov 12, 4:42 AM
mhorne added inline comments to D21928: plic: support irq distribution.
Tue, Nov 12, 4:24 AM
mhorne updated the diff for D21928: plic: support irq distribution.

Address review comments.

Tue, Nov 12, 4:23 AM

Mon, Nov 11

mhorne added inline comments to D21927: plic: fix context calculation.
Mon, Nov 11, 11:42 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Rebase.

Mon, Nov 11, 1:46 PM
mhorne updated the diff for D21927: plic: fix context calculation.

Rebase.

Mon, Nov 11, 1:45 PM
mhorne committed rS354604: plic: check for sifive compatible string.
plic: check for sifive compatible string
Mon, Nov 11, 1:39 AM
mhorne committed rS354603: plic: fix PLIC_MAX_IRQS.
plic: fix PLIC_MAX_IRQS
Mon, Nov 11, 1:36 AM

Fri, Nov 8

mhorne accepted D22284: Enable the RISCV LLVM backend by default..

I presume hard-float world can't be built yet due to https://reviews.llvm.org/D66725 still being uncommitted?

Fri, Nov 8, 9:13 PM

Tue, Nov 5

mhorne updated the diff for D21928: plic: support irq distribution.

Whoops. Upload the correct commit.

Tue, Nov 5, 1:45 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Rebase.

Tue, Nov 5, 1:43 PM

Sat, Nov 2

mhorne committed rS354263: MFC r353334:.
MFC r353334:
Sat, Nov 2, 7:52 PM
mhorne committed rS354262: MFC r352730:.
MFC r352730:
Sat, Nov 2, 7:50 PM
mhorne committed rS354261: MFC r352729:.
MFC r352729:
Sat, Nov 2, 7:49 PM
mhorne committed rS354260: MFC r340228-r340229, r340231.
MFC r340228-r340229, r340231
Sat, Nov 2, 7:46 PM
mhorne committed rS354259: RISC-V: Remove EARLY_AP_STARTUP from GENERIC.
RISC-V: Remove EARLY_AP_STARTUP from GENERIC
Sat, Nov 2, 7:33 PM

Wed, Oct 30

mhorne updated the diff for D21928: plic: support irq distribution.

Rework the changes as described. This moves all PLIC_ENABLE bit handling to the new plic_bind_intr function.
Interrupts are enabled/disabled otherwise by adjusting their priority.

Wed, Oct 30, 12:35 PM
mhorne added a comment to D21928: plic: support irq distribution.
In D21928#484625, @br wrote:

I also have a comment from jhb@:
@br typically we only route device interrupts to a single core since interrupt handlers generally assume they are not run concurrently (interrupt filters, ithreads will be single-threaded even if the interrupt is broadcast)
as Andy noted, you want to handle interrupt binding requests, but you also need to do something for the “default” case.
Not sure what INTRNG does, but on x86 we round-robin interrupts among CPUs when they are first setup.

Wed, Oct 30, 1:07 AM

Tue, Oct 29

mhorne committed rP515981: Attach sysutils/opensbi to the build.
Attach sysutils/opensbi to the build
Tue, Oct 29, 2:13 PM
mhorne committed rP515947: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.
New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware
Tue, Oct 29, 1:10 AM
mhorne closed D22164: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.
Tue, Oct 29, 1:10 AM

Sun, Oct 27

mhorne added a comment to D22164: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.

This might be too aggressive, but it can be folded more: https://gist.github.com/e48b2311f72d655b0f88c7c798e6e722
This might help adding more platforms in the future, but I'm fine with the original version.

Sun, Oct 27, 5:30 PM
mhorne updated the diff for D22164: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.

Use lhwsu's simplification.

Sun, Oct 27, 5:25 PM
mhorne updated the diff for D22164: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.

Reduce hardcoded strings.

Sun, Oct 27, 3:12 PM

Sat, Oct 26

mhorne created D22164: New port: sysutils/opensbi: OpenSBI, a RISC-V bootloader and firmware.
Sat, Oct 26, 9:13 PM

Fri, Oct 25

mhorne committed rS354104: RISC-V: skip cpu-map when parsing elf_hwcap.
RISC-V: skip cpu-map when parsing elf_hwcap
Fri, Oct 25, 9:39 PM
mhorne closed D22151: RISC-V: skip cpu-map when parsing elf_hwcap.
Fri, Oct 25, 9:39 PM
mhorne added inline comments to D21927: plic: fix context calculation.
Fri, Oct 25, 1:03 PM
mhorne created D22151: RISC-V: skip cpu-map when parsing elf_hwcap.
Fri, Oct 25, 12:58 PM
mhorne added a comment to D21928: plic: support irq distribution.
In D21928#484089, @br wrote:

Why do we need to enable interrupts for all CPUs and not only current cpu?
where an interrupt will be signaled in that case?

Fri, Oct 25, 12:39 PM

Wed, Oct 23

mhorne updated the summary of D21927: plic: fix context calculation.
Wed, Oct 23, 11:25 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Upload correct diff.

Wed, Oct 23, 11:24 PM
mhorne added inline comments to D21927: plic: fix context calculation.
Wed, Oct 23, 11:15 PM
mhorne abandoned D21940: plic: handle renumbered harts.

This is now irrelevant after the rework of D21927.

Wed, Oct 23, 11:09 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Rebase on top of changes in D21927.

Wed, Oct 23, 11:08 PM
mhorne updated the diff for D21927: plic: fix context calculation.

Rework to calculate contexts from the device tree.

Wed, Oct 23, 11:06 PM

Tue, Oct 22

mhorne accepted D22084: Fix atomic_*cmpset32 on riscv64 with clang..
Tue, Oct 22, 2:41 AM

Oct 18 2019

mhorne added a comment to D22084: Fix atomic_*cmpset32 on riscv64 with clang..
In D22084#482546, @jhb wrote:

So I now wonder if this isn't actually a compiler bug in LLVM. Specifically, section 4.2 of the 2.2 spec when talking about RV64 has this "explanatory" comment in italics:

The compiler and calling convention maintain an invariant that all 32-bit values are held in a sign-extended format in 64-bit registers. Even 32-bit unsigned integers extend bit 31 into bits 63 through 32. Consequently, conversion between unsigned and signed 32-bit integers is a no-op, as is conversion from a signed 32-bit integer to a signed 64-bit integer. Existing 64-bit wide SLTU and unsigned branch compares still operate correctly on unsigned 32-bit integers under this invariant. Similarly, existing 64-bit wide logical operations on 32-bit sign-extended integers preserve the sign-extension property. A few new instructions (ADD[I]W/SUBW/SxxW) are required for addition and shifts to ensure reasonable performance for 32-bit values.

If I'm reading this correctly, the compiler should be storing the unsigned 32-bit values as sign-extended instead of zero-extended and that clang is zero-extending the value that gets passed in to 'cmpval' incorrectly. It may be that it is only fcmpset32 that is affected due to cmpval being a pointer? In fact, I wonder if this change will in fact break GCC now as it might be passing in a 64-bit value in the cmpval register.

Oct 18 2019, 11:29 PM
mhorne created D22085: devel/riscv64-gcc: Switch upstream to official GCC and bump version to 8.3.0.
Oct 18 2019, 10:22 PM
mhorne committed rS353711: Fix build of LLVM RISC-V backend.
Fix build of LLVM RISC-V backend
Oct 18 2019, 1:47 AM
mhorne closed D21963: llvm: Add missing RISC-V source to Makefile.
Oct 18 2019, 1:47 AM

Oct 16 2019

mhorne updated subscribers of D21940: plic: handle renumbered harts.
Oct 16 2019, 7:59 PM
mhorne updated subscribers of D21928: plic: support irq distribution.
Oct 16 2019, 7:59 PM
mhorne updated subscribers of D21927: plic: fix context calculation.
Oct 16 2019, 7:57 PM

Oct 15 2019

mhorne added a comment to D21963: llvm: Add missing RISC-V source to Makefile.

Ping. Any objections? I will just commit this tomorrow if I don't hear otherwise.

Oct 15 2019, 9:44 PM

Oct 11 2019

mhorne added a comment to D21975: RISC-V: Call devmap_bootstrap().

I don't object to the change, but do we actually create any static mappings currently? This is a no-op otherwise.

FreeBSD proper doesn't on RISC-V, but downstreams do.. (or want to).

Oct 11 2019, 3:05 AM

Oct 10 2019

mhorne added a comment to D21975: RISC-V: Call devmap_bootstrap().

I don't object to the change, but do we actually create any static mappings currently? This is a no-op otherwise.

Oct 10 2019, 9:00 PM
mhorne created D21963: llvm: Add missing RISC-V source to Makefile.
Oct 10 2019, 3:48 AM

Oct 9 2019

mhorne committed rS353334: RISC-V: Fix an alignment warning in libthr.
RISC-V: Fix an alignment warning in libthr
Oct 9 2019, 2:02 AM
mhorne closed D21926: RISC-V: Fix an alignment warning in libthr.
Oct 9 2019, 2:02 AM

Oct 8 2019

mhorne added a comment to D21927: plic: fix context calculation.
In D21927#479338, @br wrote:
Oct 8 2019, 7:25 PM
mhorne added a comment to D21940: plic: handle renumbered harts.
In D21940#479242, @br wrote:

hart ID is recorded to pcpup->pc_hart. Could it be used ? i.e. PCPU_GET(hart) or pcpu_find(cpu)->pc_hart

Oct 8 2019, 5:17 PM
mhorne updated the summary of D21927: plic: fix context calculation.
Oct 8 2019, 5:16 PM
mhorne added a comment to D21927: plic: fix context calculation.
In D21927#479243, @br wrote:

I was looking at Linux driver before writing this one. Why don't they do the same ?
https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c

Oct 8 2019, 5:05 PM
mhorne created D21940: plic: handle renumbered harts.
Oct 8 2019, 12:52 PM
mhorne updated the diff for D21926: RISC-V: Fix an alignment warning in libthr.

Fix whitespace.

Oct 8 2019, 12:50 PM

Oct 7 2019

mhorne created D21928: plic: support irq distribution.
Oct 7 2019, 11:01 PM
mhorne created D21927: plic: fix context calculation.
Oct 7 2019, 10:58 PM
mhorne created D21926: RISC-V: Fix an alignment warning in libthr.
Oct 7 2019, 10:56 PM

Oct 4 2019

mhorne accepted D21888: riscv: use the common sub-word {,f}cmpset implementation.

Looks good to me. There are no sub-word atomic instructions for RISC-V.

Oct 4 2019, 2:35 AM

Sep 26 2019

mhorne added a comment to D21773: RISC-V: fix some broken relocation handling.

Note that I don't have any real way of testing this since as mentioned, none of these relocations are being emitted. I'm not entirely convinced that they are required at all, since this is the case even when compiling kmods without -fPIC. Could they be removed instead?

This is really a @br question. :)
I don't think they impose much of a maintenance burden, so I'd be slightly inclined to keep them. They at least provide a starting point should these relocation types start to appear, and in that case we'll notice pretty quickly if any bugs are still lingering. I do not have strong feelings about it though.

Sep 26 2019, 1:06 AM
mhorne committed rS352730: Fix some broken relocation handling.
Fix some broken relocation handling
Sep 26 2019, 12:58 AM
mhorne closed D21773: RISC-V: fix some broken relocation handling.
Sep 26 2019, 12:58 AM
mhorne committed rS352729: Cleanup of elf_machdep.c.
Cleanup of elf_machdep.c
Sep 26 2019, 12:54 AM
mhorne closed D21772: Style cleanup in elf_machdep.c.
Sep 26 2019, 12:54 AM

Sep 25 2019

mhorne updated the diff for D21772: Style cleanup in elf_machdep.c.

Address markj's comments.
Remove some additional blank lines.

Sep 25 2019, 12:07 AM

Sep 24 2019

mhorne committed rS352642: MFC r352430:.
MFC r352430:
Sep 24 2019, 2:41 AM
mhorne committed rS352641: MFC r352036:.
MFC r352036:
Sep 24 2019, 2:38 AM
mhorne committed rS352640: MFC r352035:.
MFC r352035:
Sep 24 2019, 2:36 AM
mhorne committed rS352639: MFC r352034:.
MFC r352034:
Sep 24 2019, 2:33 AM
mhorne committed rS352638: MFC r352033:.
MFC r352033:
Sep 24 2019, 2:30 AM
mhorne committed rS352637: MFC r352033:.
MFC r352033:
Sep 24 2019, 2:28 AM
mhorne updated the diff for D21772: Style cleanup in elf_machdep.c.

Remove an extra set of redundant parenthesis.

Sep 24 2019, 1:47 AM
mhorne added a comment to D21773: RISC-V: fix some broken relocation handling.

Note that I don't have any real way of testing this since as mentioned, none of these relocations are being emitted. I'm not entirely convinced that they are required at all, since this is the case even when compiling kmods without -fPIC. Could they be removed instead?

Sep 24 2019, 1:00 AM
mhorne updated the summary of D21773: RISC-V: fix some broken relocation handling.
Sep 24 2019, 12:56 AM
mhorne created D21773: RISC-V: fix some broken relocation handling.
Sep 24 2019, 12:55 AM
mhorne created D21772: Style cleanup in elf_machdep.c.
Sep 24 2019, 12:54 AM

Sep 16 2019

mhorne closed D21661: Support EARLY_AP_STARTUP on RISC-V.
Sep 16 2019, 10:17 PM