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mhorne (Mitchell Horne)
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Mar 22 2019, 4:46 AM (48 w, 2 h)

Recent Activity

Yesterday

mhorne added a comment to D23741: riscv: Set MACHINE_ARCH define based on TARGET_ARCH.

I found the following excerpt in bsd.cpu.mk:

Thu, Feb 20, 9:27 PM

Wed, Feb 12

mhorne committed rS357821: Implement vm.pmap.kernel_maps for RISC-V.
Implement vm.pmap.kernel_maps for RISC-V
Wed, Feb 12, 2:06 PM
mhorne closed D23594: Implement vm.pmap.kernel_maps for RISC-V.
Wed, Feb 12, 2:06 PM
mhorne committed rS357820: RISC-V: un-ifdef vm.kvm_size and vm.kvm_free.
RISC-V: un-ifdef vm.kvm_size and vm.kvm_free
Wed, Feb 12, 1:58 PM
mhorne closed D23522: RISC-V: un-ifdef vm.kvm_size and vm.kvm_free sysctls.
Wed, Feb 12, 1:58 PM

Mon, Feb 10

mhorne updated the test plan for D23594: Implement vm.pmap.kernel_maps for RISC-V.
Mon, Feb 10, 12:36 AM
mhorne created D23594: Implement vm.pmap.kernel_maps for RISC-V.
Mon, Feb 10, 12:34 AM
mhorne updated the diff for D23522: RISC-V: un-ifdef vm.kvm_size and vm.kvm_free sysctls.

Add CTLFLAG_MPSAFE. Move sysctl description to a separate line.

Mon, Feb 10, 12:32 AM

Thu, Feb 6

mhorne accepted D23521: Tidy the _set_tp function for RISC-V..
Thu, Feb 6, 7:44 PM

Wed, Feb 5

mhorne added a reviewer for D23522: RISC-V: un-ifdef vm.kvm_size and vm.kvm_free sysctls: br.
Wed, Feb 5, 11:07 PM
mhorne created D23522: RISC-V: un-ifdef vm.kvm_size and vm.kvm_free sysctls.
Wed, Feb 5, 11:02 PM
mhorne accepted D23508: Fix DDB to unwind across exception frames..

LGTM, besides the nit.

Wed, Feb 5, 8:53 PM
mhorne added a comment to D23513: Use the context created in makectx() for stack traces..
In D23513#516255, @jhb wrote:

Yes, it was probably copied from arm64 originally. Fixing it on those platforms requires auditing makectx() to make sure it DTRT however.

Wed, Feb 5, 8:52 PM
mhorne added inline comments to D23508: Fix DDB to unwind across exception frames..
Wed, Feb 5, 8:51 PM
mhorne accepted D23513: Use the context created in makectx() for stack traces..

LGTM. The change to db_trace_thread also needs doing for arm and arm64.

Wed, Feb 5, 8:24 PM
mhorne accepted D23510: Fix EXCP_MASK to include all relevant bits from scause..
Wed, Feb 5, 8:12 PM
mhorne accepted D23511: Use csr_read() to read sstatus instead of inline assembly..
Wed, Feb 5, 8:09 PM

Sat, Feb 1

mhorne closed D23406: prci: register tlclk as a fixed clock.
Sat, Feb 1, 5:14 PM
mhorne committed rS357371: prci: register tlclk as a fixed clock.
prci: register tlclk as a fixed clock
Sat, Feb 1, 5:14 PM
mhorne committed rS357370: prci: fix up compat.
prci: fix up compat
Sat, Feb 1, 5:12 PM
mhorne closed D23405: prci: fix up compat.
Sat, Feb 1, 5:12 PM
mhorne committed rS357369: prci: register the DDR and GEMGX PLLs.
prci: register the DDR and GEMGX PLLs
Sat, Feb 1, 5:10 PM
mhorne closed D23404: prci: register the DDR and GEMGX PLLs.
Sat, Feb 1, 5:10 PM

Fri, Jan 31

mhorne accepted D23436: Set the LMA of the riscv kernel to the OpenSBI jump target by default.

Thanks Alex, this is really useful. Up until now I have been converting the kernel to a flat binary to make use of OpenSBI's fw_jump.elf.

Fri, Jan 31, 8:20 PM
mhorne updated the summary of D23406: prci: register tlclk as a fixed clock.
Fri, Jan 31, 7:53 PM
mhorne updated the diff for D23406: prci: register tlclk as a fixed clock.

Rename to prci_tlclk and register unconditionally.

Fri, Jan 31, 7:46 PM
mhorne accepted D23434: Fix 64-bit value of SSTATUS_SD to use an unsigned long..

Ahh shoot, I should have been more careful. Thanks John.

Fri, Jan 31, 4:11 AM

Wed, Jan 29

mhorne committed rS357256: cgem: Add another compat string for the SiFive fu540.
cgem: Add another compat string for the SiFive fu540
Wed, Jan 29, 3:58 PM
mhorne closed D23407: cgem: Add another compat string for the SiFive fu540.
Wed, Jan 29, 3:58 PM
mhorne added inline comments to D23338: Add stricter checks on user changes to SSTATUS..
Wed, Jan 29, 3:53 PM
mhorne committed rS357255: Fix definition of SSTATUS_SD.
Fix definition of SSTATUS_SD
Wed, Jan 29, 3:51 PM
mhorne closed D23402: Fix definition of SSTATUS_SD.
Wed, Jan 29, 3:51 PM

Tue, Jan 28

mhorne updated the diff for D23404: prci: register the DDR and GEMGX PLLs.

Fix DDR and GEMGX clock IDs

Tue, Jan 28, 10:24 PM
mhorne updated the test plan for D23407: cgem: Add another compat string for the SiFive fu540.
Tue, Jan 28, 8:38 PM
mhorne created D23407: cgem: Add another compat string for the SiFive fu540.
Tue, Jan 28, 8:37 PM
mhorne added a comment to D23404: prci: register the DDR and GEMGX PLLs.
In D23404#513349, @kp wrote:

At first glance this looks good.
I have a SiFive FU540 I can test with tomorrow.
I only implemented the core clock because it feeds the SPI / UART / I2C clocks. The DDR and gigabit ethernet clocks were not relevant.

Tue, Jan 28, 8:35 PM
mhorne added a comment to D23406: prci: register tlclk as a fixed clock.

Snippet from the older device tree, provided by SiFive's FSBL:

		prci: prci@10000000 {
			compatible = "sifive,aloeprci0", "sifive,ux00prci0";
			reg = <0x0 0x10000000 0x0 0x1000>;
			reg-names = "control";
			clocks = <&refclk>;
			#clock-cells = <1>;
		};
		tlclk: tlclk {
			compatible = "fixed-factor-clock";
			clocks = <&prci 0>;
			#clock-cells = <0>;
			clock-div = <2>;
			clock-mult = <1>;
		};
Tue, Jan 28, 8:26 PM
mhorne created D23406: prci: register tlclk as a fixed clock.
Tue, Jan 28, 8:19 PM
mhorne added a comment to D23405: prci: fix up compat.

I'm inferring that this driver was written using this device tree, as this is what is passed by the FSBL. If there is a different one that was used please point me to it.

Tue, Jan 28, 8:18 PM
mhorne updated the summary of D23404: prci: register the DDR and GEMGX PLLs.
Tue, Jan 28, 8:15 PM
mhorne created D23405: prci: fix up compat.
Tue, Jan 28, 8:07 PM
mhorne updated the test plan for D23404: prci: register the DDR and GEMGX PLLs.
Tue, Jan 28, 8:05 PM
mhorne created D23404: prci: register the DDR and GEMGX PLLs.
Tue, Jan 28, 7:58 PM
mhorne created D23402: Fix definition of SSTATUS_SD.
Tue, Jan 28, 5:53 PM
mhorne added a comment to D23338: Add stricter checks on user changes to SSTATUS..
In D23338#511790, @jhb wrote:

I don't think we want to let userland change UXL though? If we supported riscv32 and freebsd32, then you would set UXL during the freebsd32 exec_setregs(), but it would otherwise need to be static until the next exec?

Tue, Jan 28, 5:25 PM
mhorne added inline comments to D23394: Trim duplicate CSR swaps from user exceptions..
Tue, Jan 28, 5:08 PM

Thu, Jan 23

mhorne accepted D23338: Add stricter checks on user changes to SSTATUS..
Thu, Jan 23, 8:25 PM

Jan 17 2020

mhorne accepted D23219: Check for invalid sstatus values in set_mcontext()..
Jan 17 2020, 5:17 PM
mhorne committed rS356835: RISC-V: fix global pointer assignment at boot.
RISC-V: fix global pointer assignment at boot
Jan 17 2020, 5:03 PM
mhorne closed D23139: RISC-V: fix global pointer assignment at boot.
Jan 17 2020, 5:03 PM
mhorne added inline comments to D23219: Check for invalid sstatus values in set_mcontext()..
Jan 17 2020, 4:59 PM
mhorne added a comment to D23218: Save and restore floating point registers in get/set_mcontext()..

Just curious, why does spike in particular exercise sendsig/sigreturn?

Jan 17 2020, 4:48 PM
mhorne accepted D23218: Save and restore floating point registers in get/set_mcontext()..
Jan 17 2020, 4:45 PM

Jan 16 2020

mhorne added a comment to D23139: RISC-V: fix global pointer assignment at boot.

Ping. Are you happy with this?

Jan 16 2020, 6:04 PM

Jan 13 2020

mhorne committed rS356675: RISC-V: fix global symbol lookups for mpentry with lld.
RISC-V: fix global symbol lookups for mpentry with lld
Jan 13 2020, 3:39 AM
mhorne closed D23138: RISC-V: fix global symbol lookups for mpentry with lld.
Jan 13 2020, 3:39 AM

Jan 12 2020

mhorne updated the diff for D23139: RISC-V: fix global pointer assignment at boot.

Use lla, not la. Use longer comment for mpva as well.

Jan 12 2020, 12:03 AM

Jan 11 2020

mhorne created D23139: RISC-V: fix global pointer assignment at boot.
Jan 11 2020, 11:52 PM
mhorne created D23138: RISC-V: fix global symbol lookups for mpentry with lld.
Jan 11 2020, 11:46 PM

Jan 10 2020

mhorne committed rS356592: Replace inline assembly with rdtime macro.
Replace inline assembly with rdtime macro
Jan 10 2020, 3:17 AM

Jan 8 2020

mhorne accepted D23089: Use clang and lld as the default toolchain for RISCV..
Jan 8 2020, 5:20 PM
mhorne accepted D23076: Add -mno-relax to CFLAGS in bsd.prog/lib.mk instead of bsd.cpu.mk..
Jan 8 2020, 4:58 PM

Dec 25 2019

mhorne added a comment to D22920: For riscv kernel builds, add -N to LDFLAGS instead of replacing the SYSTEM_LD variable..
In D22920#502165, @ian wrote:

Just an update to note that the commit for this was reverted in r356078 due to CI build failures. I'm unable to install a working riscv toolchain for building and testing myself, apparently at least in part because I'm still running 12.0-stable (and if I try to upgrade from that my video card turns into a pumpkin).

Dec 25 2019, 10:42 PM

Dec 18 2019

mhorne added a comment to D22869: devel/llvm-devel: fix llvm-devel.mk vars.

LGTM. I'll commit along with and update of the snapshot shortly

Dec 18 2019, 10:11 PM
mhorne created D22869: devel/llvm-devel: fix llvm-devel.mk vars.
Dec 18 2019, 9:17 PM

Dec 5 2019

mhorne accepted D22659: Add a new "riscv-relaxations" linker feature..

There isn't really a precedent for arch-specific linker features, but I don't think it's an issue. Do you know how long it might be before we see support for relaxations in lld? If it's not long, could we not just check for lld directly instead of using a linker feature?

Dec 5 2019, 12:07 AM

Nov 16 2019

mhorne committed rS354765: RISC-V: busdma_bounce: fix BUS_DMA_ALLOCNOW for non-paged aligned sizes.
RISC-V: busdma_bounce: fix BUS_DMA_ALLOCNOW for non-paged aligned sizes
Nov 16 2019, 1:26 AM

Nov 15 2019

mhorne added a comment to D21928: plic: support irq distribution.

@br thanks for your help and patience in reviewing these PLIC changes. I learned a lot while writing them!

Nov 15 2019, 3:42 AM
mhorne committed rS354722: RISC-V: Print SBI info at startup.
RISC-V: Print SBI info at startup
Nov 15 2019, 3:40 AM
mhorne closed D22327: RISC-V: Print SBI info at startup.
Nov 15 2019, 3:40 AM
mhorne committed rS354721: Add missing files from r354720.
Add missing files from r354720
Nov 15 2019, 3:38 AM
mhorne committed rS354720: RISC-V: add support for SBI spec v0.2.
RISC-V: add support for SBI spec v0.2
Nov 15 2019, 3:34 AM
mhorne closed D22326: RISC-V: add support for SBI spec v0.2.
Nov 15 2019, 3:34 AM
mhorne committed rS354719: RISC-V: pass arg6 in sbi_call.
RISC-V: pass arg6 in sbi_call
Nov 15 2019, 3:22 AM
mhorne closed D22325: RISC-V: pass arg6 in sbi_call.
Nov 15 2019, 3:22 AM
mhorne committed rS354718: plic: support irq distribution.
plic: support irq distribution
Nov 15 2019, 3:18 AM
mhorne closed D21928: plic: support irq distribution.
Nov 15 2019, 3:18 AM
mhorne committed rS354717: plic: fix context calculation.
plic: fix context calculation
Nov 15 2019, 3:15 AM
mhorne closed D21927: plic: fix context calculation.
Nov 15 2019, 3:15 AM

Nov 13 2019

mhorne added inline comments to D22327: RISC-V: Print SBI info at startup.
Nov 13 2019, 2:51 AM
mhorne updated the diff for D22327: RISC-V: Print SBI info at startup.

Address comments.

Nov 13 2019, 2:48 AM
mhorne updated the diff for D22326: RISC-V: add support for SBI spec v0.2.

Fix sbi_console_getchar.

Nov 13 2019, 2:45 AM
mhorne abandoned D22343: Test Plan:.

I hate arc sometimes.

Nov 13 2019, 2:44 AM
mhorne created D22343: Test Plan:.
Nov 13 2019, 2:43 AM

Nov 12 2019

mhorne updated the test plan for D22327: RISC-V: Print SBI info at startup.
Nov 12 2019, 4:57 AM
mhorne created D22327: RISC-V: Print SBI info at startup.
Nov 12 2019, 4:53 AM
mhorne created D22326: RISC-V: add support for SBI spec v0.2.
Nov 12 2019, 4:50 AM
mhorne created D22325: RISC-V: pass arg6 in sbi_call.
Nov 12 2019, 4:45 AM
mhorne retitled D21928: plic: support irq distribution from plic: improve enable bit handling to plic: support irq distribution.
Nov 12 2019, 4:42 AM
mhorne added inline comments to D21928: plic: support irq distribution.
Nov 12 2019, 4:24 AM
mhorne updated the diff for D21928: plic: support irq distribution.

Address review comments.

Nov 12 2019, 4:23 AM

Nov 11 2019

mhorne added inline comments to D21927: plic: fix context calculation.
Nov 11 2019, 11:42 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Rebase.

Nov 11 2019, 1:46 PM
mhorne updated the diff for D21927: plic: fix context calculation.

Rebase.

Nov 11 2019, 1:45 PM
mhorne committed rS354604: plic: check for sifive compatible string.
plic: check for sifive compatible string
Nov 11 2019, 1:39 AM
mhorne committed rS354603: plic: fix PLIC_MAX_IRQS.
plic: fix PLIC_MAX_IRQS
Nov 11 2019, 1:36 AM

Nov 8 2019

mhorne accepted D22284: Enable the RISCV LLVM backend by default..

I presume hard-float world can't be built yet due to https://reviews.llvm.org/D66725 still being uncommitted?

Nov 8 2019, 9:13 PM

Nov 5 2019

mhorne updated the diff for D21928: plic: support irq distribution.

Whoops. Upload the correct commit.

Nov 5 2019, 1:45 PM
mhorne updated the diff for D21928: plic: support irq distribution.

Rebase.

Nov 5 2019, 1:43 PM

Nov 2 2019

mhorne committed rS354263: MFC r353334:.
MFC r353334:
Nov 2 2019, 7:52 PM