Page MenuHomeFreeBSD

mmel (Michal Meloun)
User

Projects

User Details

User Since
Feb 3 2015, 4:54 AM (201 w, 3 d)

Recent Activity

Today

mmel committed rS342078: MFC r341679:.
MFC r341679:
Fri, Dec 14, 10:46 AM
mmel committed rS342077: MFC r341679:.
MFC r341679:
Fri, Dec 14, 10:30 AM
mmel committed rS342075: MFC r341511,r341512,r341513:.
MFC r341511,r341512,r341513:
Fri, Dec 14, 10:25 AM
mmel committed rS342074: MFC r341511,r341512,r341513:.
MFC r341511,r341512,r341513:
Fri, Dec 14, 10:20 AM

Sun, Dec 9

mmel added a comment to D17137: arm64: Add HWCAP support.

Imho, aggregated reading of ID registers is not a best solution.
Personally, I think that we should implement aggregated view by using HWCAPS (As we must do this in any case, upcoming COMPAT32 simply expects this).
But we should return actual/real values of ID registers. This allow us to write program which iterates over clusters and selects best cores for given workload.
I mainly talking about SHA or SVE extensions here.

Sun, Dec 9, 12:30 PM
mmel committed rS341760: MFC r341393:.
MFC r341393:
Sun, Dec 9, 6:48 AM

Sat, Dec 8

mmel updated the diff for D18417: Improve R_AARCH64_TLSDESC relocation..
Sat, Dec 8, 3:20 PM
mmel committed rS341738: Implement R_AARCH64_TLS_DTPMOD64 and A_AARCH64_TLS_DTPREL64 relocations..
Implement R_AARCH64_TLS_DTPMOD64 and A_AARCH64_TLS_DTPREL64 relocations.
Sat, Dec 8, 2:58 PM

Fri, Dec 7

mmel committed rS341679: Fix cut&paste typo in atomic_fetchadd_64()..
Fix cut&paste typo in atomic_fetchadd_64().
Fri, Dec 7, 11:13 AM

Wed, Dec 5

mmel committed rS341513: Tidy up arm64 reloc_jmpslots() implementation..
Tidy up arm64 reloc_jmpslots() implementation.
Wed, Dec 5, 10:32 AM
mmel committed rS341512: Implement arm64 version of __tls_get_addr()..
Implement arm64 version of __tls_get_addr().
Wed, Dec 5, 10:25 AM
mmel committed rS341511: Fix style(9)..
Fix style(9).
Wed, Dec 5, 10:25 AM
mmel added a comment to D14409: Sandbox head(1) with fileargs..

bingo! I'm on r341345. And yes, r341347 fixed it.
Thanks and sorry for noise.

Wed, Dec 5, 5:06 AM

Tue, Dec 4

mmel added a comment to D14409: Sandbox head(1) with fileargs..

Ahh, right, I overlooked this, sorry. So I taking back WITHOUT_CAPSICUM case.

Tue, Dec 4, 2:43 PM
mmel added a comment to D14409: Sandbox head(1) with fileargs..

How this can works on kernels build without 'options CAPABILITIES'? Note that CAPABILITIES option is
not included in kernel option for small embedded boards (arm, mips...)?
We should change CAPSICUM to mandatory or implement fallback here (as we already do in rest of tree)

Tue, Dec 4, 2:04 PM

Mon, Dec 3

mmel created D18417: Improve R_AARCH64_TLSDESC relocation..
Mon, Dec 3, 10:26 AM

Sun, Dec 2

mmel added a comment to D17367: Eliminate pointless calls to vm_fault_prefault().

Only kernel was changed during bisecting, nothing else. And all kernels was cross-compiled by
same toolchain. Kernel before r339819 works, r339819 hangs, and fresh current with r339819
reverted also works. Also, during bisecting, any kernel after r339819 hangs.
So I thing that r339819 is culprit.

Sun, Dec 2, 3:59 PM
mmel added a comment to D17367: Eliminate pointless calls to vm_fault_prefault().

Unfortunately, this patch destabilized arm kernel.
The bad thing is that my Tegra does not panic, just hangs hard and I can’t even enter the JTAG debugger [1].
Moreover, this issue is very rare, I can do finish full buildkernel in most cases. The only known testcase is full
build of qt5-webengine (~16k of C++ files, +10 hours of compilation time).

Sun, Dec 2, 1:57 PM
mmel committed rS341394: MFC r338317:.
MFC r338317:
Sun, Dec 2, 7:45 AM
mmel committed rS341393: Return computed real memory size, not a value from similarly named.
Return computed real memory size, not a value from similarly named
Sun, Dec 2, 7:41 AM

Thu, Nov 15

mmel added inline comments to D17978: regulator_fixed: Do not disable fixed regulator at probe.
Thu, Nov 15, 6:19 AM

Nov 3 2018

mmel added a member for arm64: mmel.
Nov 3 2018, 8:58 AM

Oct 30 2018

mmel added a comment to D17750: extres/phy: Add phy_set_mode method.

Manu,
can you, please, subclass phy to USB specialized variant (say phyusb or usbphy)? You can use clk (clkdiv, clkmux ...) as template. We should implement lots of USB OTG related function here. VBUS voltage and over-current detection, ID pin status change interrupt, OTG state machine and I thing that should use proper layering from beginning.
If you too busy for this, I can implement (empty) subclass in next 2-3 days.

Oct 30 2018, 8:52 AM · arm64, ARM

Aug 25 2018

mmel committed rS338317: Fix wrong offset calculation for R_ARM_TLS_TPOFF32 relocations..
Fix wrong offset calculation for R_ARM_TLS_TPOFF32 relocations.
Aug 25 2018, 4:54 PM

Aug 22 2018

mmel added a comment to D16510: Rework rtld's TLS Variant I implementation to match r326794.

Firstly, I want to say that this patch is OK. It only slightly changed memory layout for TLS segment (because it uses malloc_aligned()) which exposed unrelated bug in ARM TLS relocation.

Aug 22 2018, 10:40 AM

Aug 13 2018

mmel committed rS337705: MFC r335249:.
MFC r335249:
Aug 13 2018, 8:48 AM
mmel committed rS337704: Add USB ID for rebranded RTL8153 found on NVIDIA Jetson TX1 board..
Add USB ID for rebranded RTL8153 found on NVIDIA Jetson TX1 board.
Aug 13 2018, 7:28 AM

Aug 8 2018

mmel added a comment to D16555: Add support for pmap_enter(..., psind == 1) to armv6's pmap.
In D16555#353199, @alc wrote:

Which linker is being used?

Can you please email me the output of "procstat -av"?

Output mailed directly.
And about linker - it's hard to say :)

Aug 8 2018, 7:31 AM
mmel accepted D16555: Add support for pmap_enter(..., psind == 1) to armv6's pmap.

Tested on Jetson TK1 (cortex-A15) without single problem.
From preliminary collected statistic it looks like pmap_enter(..., psind == 1) is used ~60 times per buildworld.
Unfortunately, the same statistic also told me that is pmap_enter_object() doesn't not create single 1MB mappings, even for shared libraries.
I'm pretty sure that this worked before - but this regression is not related to this patch.

Aug 8 2018, 6:35 AM

Aug 1 2018

mmel accepted D16517: snd_hda: Enable bus_dmamap_sync operations, both new and uncommented.

The commit message is a bit misleading. This patch ensures DMA coherency only for control structures but audio data buffers are not covered by required bus_dmamap_sync() operations. (We simply don't have right sync operation for syncing in progress DMA buffers - something like make buffer range snapshot before CPU read and make buffer range snapshot after CPU write).
Can you, please, elaborate this fact in commit message.

Aug 1 2018, 8:40 AM

Jul 29 2018

mmel accepted D16443: Prepare for adding psind == 1 support to armv6's pmap_enter().

Applied, booted new kernel and make buildworld passed without problem.
LGTM.
Thanks for your ARM effort.

Jul 29 2018, 9:51 AM

Jun 16 2018

mmel updated the diff for D13861: Add support for booting FreeBSD kernel directly from U_Boot using booti command..

Rebased to current, renamed UBOOT_BOOT_API to LINUX_BOOT_API

Jun 16 2018, 9:32 AM

Mar 9 2018

mmel accepted D14541: Make Raspberry Pi RNG compatible with upstream DTBs.
Mar 9 2018, 5:18 AM

Mar 2 2018

mmel accepted D14541: Make Raspberry Pi RNG compatible with upstream DTBs.

Tested also on RPi-B (armv6) without problem.
Please, also remove rng related lines from sys/dts/arm/rpi[2].dts stubs.

Mar 2 2018, 11:35 AM

Feb 10 2018

mmel added a comment to D14299: sysutils/rpi-firware Include dtb and overlays.

+100 for overlays.
But I'm not sure if it's right time to publish base .dtb files in this way. We cannot use it for now (because interrupts for uart and spi are routed throw "bcm2835-aux") and it's unclear if binding headers (dts/include/dt-bindings/*) are same (or compatible) as linux mainstream ones.

Feb 10 2018, 5:07 PM

Jan 19 2018

mmel updated the diff for D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7..
  • print actual mitigation variant if bootversode
  • slightly restructure code to make additional vendors or CPUs addition easier
Jan 19 2018, 5:07 PM

Jan 18 2018

mmel added inline comments to D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7..
Jan 18 2018, 2:47 PM
mmel updated the diff for D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7..

Addressed all objections.

Jan 18 2018, 2:18 PM

Jan 17 2018

mmel added inline comments to D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7..
Jan 17 2018, 7:00 AM

Jan 16 2018

mmel retitled D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7. from Implement BP hardening as mitigation for Spectre Version 2 attacks on ARMv7 platforms. to Implement mitigation for Spectre Version 2 attacks on ARMv7..
Jan 16 2018, 7:51 AM
mmel created D13931: Implement mitigation for Spectre Version 2 attacks on ARMv7..
Jan 16 2018, 6:16 AM

Jan 12 2018

mmel updated the diff for D13863: Simplify and cleanup startup code for secondary cores..
Jan 12 2018, 8:42 AM
mmel added a comment to D13861: Add support for booting FreeBSD kernel directly from U_Boot using booti command..

You didn't describe any reason it wouldn't work. Rather than the kernel as the first argument to booti, it would be the second, after either passing it through mkimage, or loading it as a raw file with a size.

mkimage, imho, is not supported(or not preferred - it have bundled load address inside) on arm64, but this is not important yet.

Jan 12 2018, 8:01 AM
mmel added a comment to D13864: Add workaround for broken PSCI implementation..

I agree but, unfortunately, yes. The context_id is used for selecting right stack. See line 270 in new file.

Jan 12 2018, 7:14 AM
mmel added a comment to D13863: Simplify and cleanup startup code for secondary cores..

Boot CPU have always cpuid 0 so yes, it boots (i hope). I have disordered cpus nodes in my DTS and all looks OK.

Jan 12 2018, 7:09 AM

Jan 11 2018

mmel added a comment to D13861: Add support for booting FreeBSD kernel directly from U_Boot using booti command..

Yep, I known. But my actual situation with Jetson TX1 board is more complicated.

  • the TX1 firmware can only load U-Boot for eMMC.
  • shipped U-Boot doesn't support EFI
  • on OS start, U-Boot modifies DTB (it excludes memory used by secure monitor and PSCI,, it modifies the pinmux table so that it matches the current setting), it stored trained settings for DDR4 controller for various memory frequencies...)
Jan 11 2018, 4:12 PM
mmel added a parent revision for D13864: Add workaround for broken PSCI implementation.: D13863: Simplify and cleanup startup code for secondary cores..
Jan 11 2018, 3:46 PM
mmel added a child revision for D13863: Simplify and cleanup startup code for secondary cores.: D13864: Add workaround for broken PSCI implementation..
Jan 11 2018, 3:46 PM
mmel created D13864: Add workaround for broken PSCI implementation..
Jan 11 2018, 3:46 PM
mmel created D13863: Simplify and cleanup startup code for secondary cores..
Jan 11 2018, 3:44 PM
mmel created D13861: Add support for booting FreeBSD kernel directly from U_Boot using booti command..
Jan 11 2018, 2:57 PM

Dec 26 2017

mmel added a comment to D13619: axp209: move driver to sys/dev/pmic.

imho, we should put platform specialized drivers to dev subtree only if given driver can be reused on multiple platforms. I personally vote for not moving it.

Dec 26 2017, 12:04 PM

Dec 23 2017

mmel accepted D13521: syscon: Introduce kobj and split out fdt bits.

Perfect, thanks.

Dec 23 2017, 9:20 AM

Dec 21 2017

mmel added a comment to D13521: syscon: Introduce kobj and split out fdt bits.

Everything else looks OK for me.

Dec 21 2017, 4:30 AM
mmel added a comment to D13536: Set the address of translation table for thread0..

Nice, this looks OK for me
But,it seems that there are some related problems:

  • the PCB for proc0/thread0 is allocated on top of stack, from dirty memory, but not all fields are not initialized - this is probably a root cause why this bug is not visible on all boards.
  • we leaks initial low memory mappings in kernel_pmap. This can results to double mappings with different attributes which is undefined behavior. Imho, we should clear all mappings in low memory region.
Dec 21 2017, 4:07 AM

Dec 19 2017

mmel added a comment to D13536: Set the address of translation table for thread0..

yes, but the fix looks incorrect for me.
I think that we can have same problem with secondary cores(idle threads). Imho, cpu_startup() is more appropriate place for this and we should derive TTBR0 value from kernel_pmap[1]. See arm version of cpu_startup() and call to pmap_set_pcb_pagedir(kernel_pmap, pcb); .

Dec 19 2017, 3:41 PM
mmel accepted D8720: Add ACPI support to the GICv2 and GICv3 drivers..

No objection from arm or intrng side.

Dec 19 2017, 3:04 PM
mmel added a comment to D13536: Set the address of translation table for thread0..

I can confirm same issue on Cortex-A72. Loading zero to TTBR0_EL1 causes immediate exception (in sched_switch+0x3a0).

Dec 19 2017, 2:58 PM

Dec 12 2017

mmel added inline comments to D13455: u-boot-tools: Add new ports u-boot-tools.
Dec 12 2017, 4:54 AM
mmel accepted D13455: u-boot-tools: Add new ports u-boot-tools.

Thanks !!!

Dec 12 2017, 4:51 AM

Dec 8 2017

mmel added a comment to D13378: Rework alignment handling in __libc_allocate_tls() for Variant I of TLS layout..

Kib,
thanks. I will incorporate all your comments into final commit.

Dec 8 2017, 10:04 AM

Dec 5 2017

mmel created D13378: Rework alignment handling in __libc_allocate_tls() for Variant I of TLS layout..
Dec 5 2017, 4:46 PM

Nov 29 2017

mmel added a comment to D13152: math/R: Fix build on armv6 and armv7 (RE: Bug 223476).

Sorry for delay. We don't support arm for FreeBSD 10 and arm packages are built only for FreeBSD11 and higher.
See http://pkg.freebsd.org/

Nov 29 2017, 1:22 PM

Nov 25 2017

mmel added a comment to D13134: [mips32/tls] change TCB size from 8 to 16 to be aligned with r324938 & r325364.

Generally speaking, I think that implementing more and more knowledge about TLS ABI into kernel is direct way to hell and it simply leads to hard to solve compatibility issues.
The ideal kernel should take TP pointer as opaque value, without any attempt to interpret it.

Nov 25 2017, 8:58 AM

Nov 20 2017

mmel added a comment to D13134: [mips32/tls] change TCB size from 8 to 16 to be aligned with r324938 & r325364.

with full respect, I don’t think that this is right way. Moreover, I think that you papering over real problem there.
With this patch, what’s happen if someone requests any higher alignment (that actual 16) for TLS data? Or, can patched kernel run the old init (pre r324938)?

Nov 20 2017, 3:19 PM

Nov 19 2017

mmel accepted D13152: math/R: Fix build on armv6 and armv7 (RE: Bug 223476).

I can confirm that R cad be built on native ARMv7 system with this.

Nov 19 2017, 7:52 AM

Nov 3 2017

mmel added a comment to D12816: Fix qt5 builds on some arm architectures.

Seems that exp-run passed without problems. Can you, please, commit this ?

Nov 3 2017, 6:20 AM
mmel added inline comments to D12907: Add alignment support to __libc_allocate_tls()..
Nov 3 2017, 6:06 AM

Nov 2 2017

mmel added inline comments to D12907: Add alignment support to __libc_allocate_tls()..
Nov 2 2017, 4:21 PM
mmel updated the diff for D12907: Add alignment support to __libc_allocate_tls()..
  • malloc_aligned() modified to rtld version
  • added alignment fix also for Variant I
  • check malloc() return values
  • use custom version of assert()
Nov 2 2017, 4:19 PM
mmel added inline comments to D12907: Add alignment support to __libc_allocate_tls()..
Nov 2 2017, 1:22 PM
mmel created D12907: Add alignment support to __libc_allocate_tls()..
Nov 2 2017, 6:41 AM

Oct 30 2017

mmel accepted D12816: Fix qt5 builds on some arm architectures.
Oct 30 2017, 1:16 PM

Oct 20 2017

mmel added a comment to D12743: Make elf_aux_info() as public libc function..
In D12743#264414, @kib wrote:

Does it make sense to include machine/elf.h from auxv.h ? Why not make it a user duty ?

Imho yes, AT_ values are defined in machine/elf.h so user should include it in (almost) all cases.

Would be nice to provide some kind of man page.

I will ask Ian for man page, this kind of job is significantly out of my skill (even in my native language). My bad I known.

Oct 20 2017, 2:39 PM
mmel created D12743: Make elf_aux_info() as public libc function..
Oct 20 2017, 1:48 PM
mmel updated the diff for D12699: Add AT_HWCAP2 ELF auxiliary vector. .

Split out libc changes

Oct 20 2017, 1:46 PM

Oct 18 2017

mmel updated the diff for D12699: Add AT_HWCAP2 ELF auxiliary vector. .

Drop getauxval(), make _elf_aux_info() public.

Oct 18 2017, 3:48 PM
mmel added a comment to D12699: Add AT_HWCAP2 ELF auxiliary vector. .

My exp-run for selected ports just ended and It found unexpected problem.
Some ports detect getauxval() presence and if is present then expect that all (linux specific) AT_ flags are defined and implemented (e.g. security/p11-kit ).

Oct 18 2017, 11:15 AM

Oct 17 2017

mmel added inline comments to D12699: Add AT_HWCAP2 ELF auxiliary vector. .
Oct 17 2017, 3:39 PM
mmel created D12699: Add AT_HWCAP2 ELF auxiliary vector. .
Oct 17 2017, 1:31 PM

Sep 10 2017

mmel accepted D12294: Add ptrace operations to fetch and store VFP registers..
Sep 10 2017, 5:36 AM
mmel accepted D12293: Add a NT_ARM_VFP ELF core note to hold VFP registers for each thread..
Sep 10 2017, 5:34 AM
mmel accepted D12292: Only mess with VFP state on the CPU for curthread for get/set_vfpcontext..
Sep 10 2017, 5:32 AM
mmel accepted D12291: Add AT_HWCAP flags for VFP settings for FreeBSD/arm..
Sep 10 2017, 5:21 AM

Sep 9 2017

mmel added inline comments to D12010: Support armv7 builds for userland.
Sep 9 2017, 6:00 AM

Sep 8 2017

mmel accepted D12274: End softfp->hardfp transition period for arm.

Can be this MFCed to stable? In other words, do we support in place upgrade from 10 (soft FP ABI) to 11 (hard FP ABI)?
From my point of view, this is OK for FBSD 12.

Sep 8 2017, 3:27 PM

Sep 6 2017

mmel added inline comments to D8616: Rework the logic for finding the pic object..
Sep 6 2017, 10:11 AM

Aug 11 2017

mmel accepted D11957: Only return the current cpu if it's in the cpumask.
Aug 11 2017, 11:24 AM
mmel accepted D11846: Add to sysreg definition for coproc regs required for virtualization.
Aug 11 2017, 11:23 AM

Aug 4 2017

mmel added inline comments to D11846: Add to sysreg definition for coproc regs required for virtualization.
Aug 4 2017, 5:21 AM

Jun 28 2017

mmel accepted D11393: Start to remove _libc_arm_fpu_present checks.
Jun 28 2017, 3:54 PM

Jun 21 2017

mmel accepted D11204: Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms.
Jun 21 2017, 1:57 PM · ARM

Jun 18 2017

mmel accepted D11245: Disable PL310 outer cache sync for IO coherent platforms.
Jun 18 2017, 3:44 AM · ARM

Jun 17 2017

mmel added a comment to D11238: Allow to fetch tunable variable introduced in r319896 from getenv().

Oups, my bad, sorry.
We cannot use standard way for tunable sysctl initialization here. SYSINIT machinery is executed far after cpuinfo_init() so boot CPU doesn't get right quirks.
Anyway, I submitted fix for this in r320054.
So again, sorry for troubles...

Jun 17 2017, 3:52 PM
mmel added a comment to D11245: Disable PL310 outer cache sync for IO coherent platforms.

I'm fine with rest.

Jun 17 2017, 3:45 PM · ARM
mmel accepted D10218: Implement workaround for Armada 38X family HW issue between CPU and devices.
Jun 17 2017, 4:11 AM

Jun 15 2017

mmel added a comment to D11203: Create root DMA tag and fix MBUS windows on DMA coherent platforms.
In D11203#231935, @meloun-miracle-cz wrote:

I do not think this patch was accepted in mainline Linux -> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363953.html

But this one is -> https://github.com/torvalds/linux/commit/98ea2dba65932ffc456b6d7b11b8a0624e2f7b95
Please note that commit log uses "the outer cache sync operation is useless: and not a " the entire outer cache operations are useless".
Also note that this behavior is driven by "arm,io-coherent" property.

Event better. We were thinking how to replace the callbacks in the pl310 in a nice way. Are you ok with using "arm,io-coherent" property in pl310 in a similar way?

I'm fine with both solutions, with preference to "arm,io-coherent". Using standardized, documented way is always better :)

Jun 15 2017, 2:54 PM · ARM
mmel added a comment to D11203: Create root DMA tag and fix MBUS windows on DMA coherent platforms.

I do not think this patch was accepted in mainline Linux -> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363953.html

Jun 15 2017, 12:41 PM · ARM
mmel added a comment to D11203: Create root DMA tag and fix MBUS windows on DMA coherent platforms.

When a PL310 cache is used in a system that provides hardware
coherency, the entire outer cache operations are useless, and can be
skipped.

This is significantly incorrect/misleading/false sentence. All these outer cache operations are necessary for standard mapping operations, irrespective of coherency status.
Please, reword this part in commit.

Jun 15 2017, 11:04 AM · ARM

Jun 14 2017

mmel added a comment to D10909: Add detection of CPU class for ARMv6/v7.

Too late but still...
What exactly is "cpu_class" and why we need at all? I understand why it's useful for ARMv4, but it's near useless for ARMv7 (there is too much variants)

Jun 14 2017, 4:31 PM · ARM