- User Since
- Nov 27 2014, 10:57 AM (259 w, 4 d)
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I also have a comment from jhb@:
@br typically we only route device interrupts to a single core since interrupt handlers generally assume they are not run concurrently (interrupt filters, ithreads will be single-threaded even if the interrupt is broadcast)
as Andy noted, you want to handle interrupt binding requests, but you also need to do something for the “default” case.
Not sure what INTRNG does, but on x86 we round-robin interrupts among CPUs when they are first setup.
Fri, Oct 25
Why do we need to enable interrupts for all CPUs and not only current cpu?
where an interrupt will be signaled in that case?
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Are these example of PLIC contexts?
interrupts-extended = < &cpu0_intc 0xffffffff &cpu1_intc 0xffffffff &cpu1_intc 9 &cpu2_intc 0xffffffff &cpu2_intc 9 &cpu3_intc 0xffffffff &cpu3_intc 9 &cpu4_intc 0xffffffff &cpu4_intc 9>;
- Infer the tracing device based on compiler architecture (PT on amd64, Coresight on aarch64)
- Document all the pmctrace usage flags
I was looking at Linux driver before writing this one. Why don't they do the same ?
hart ID is recorded to pcpup->pc_hart. Could it be used ? i.e. PCPU_GET(hart) or pcpu_find(cpu)->pc_hart
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I discussed with James Clarke jrtc27, it is fine
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Check if device is opened before writing to it or closing it. This could happen if user process forks.
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- Assert that hart < MAXCPU
- Rename cpu variable to hart
Fix bug: use CPU_FILL to fill up kernel pmap pm_active.
all_harts is not initialized yet in pmap_boostrap()
Use all_harts mask in release_aps()
- Store hart in struct pcpu
- Store harts not CPUIDs in pmap->pm_active