br (Ruslan Bukin)
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User Since
Nov 27 2014, 10:57 AM (163 w, 6 d)

Recent Activity

Tue, Jan 16

br committed rS328044: Fix bug: increment the value of pmcstat_npmcs instead of moving pointer.
Fix bug: increment the value of pmcstat_npmcs instead of moving pointer
Tue, Jan 16, 9:31 AM

Fri, Jan 12

br accepted D13856: Fix `make` in sys/modules.
Fri, Jan 12, 10:13 AM

Wed, Jan 3

br added a comment to D12746: modify embed_mfs.sh to embed an MFS image into either loader.efi or the kernel.

Yes, it works fine if I revert this change.

Wed, Jan 3, 6:35 PM
br added a comment to D12746: modify embed_mfs.sh to embed an MFS image into either loader.efi or the kernel.

file -b ./sys/tools/embed_mfs.sh /usr/home/br/obj/usr/home/br/dev/freebsd-riscv/riscv.riscv64/sys/GENERIC/kernel
POSIX shell script, ASCII text executable
ELF 64-bit LSB executable, UCB RISC-V, version 1 (SYSV), dynamically linked, interpreter /red/herring, BuildID[sha1]=cfcb61ddf3a05dc0d59ba084b79d4194b40cf46b, not stripped

Wed, Jan 3, 6:23 PM
br added a comment to D12746: modify embed_mfs.sh to embed an MFS image into either loader.efi or the kernel.

I am getting this error now:

Wed, Jan 3, 4:48 PM

Tue, Dec 26

br added a comment to D13627: sys/arm/amlogic: remove support for it.

What if Amlogic come up with some new ARMv7/v8 SoC later? They will probably reuse some peripheral devices from their old SoCs.
Look like it is plenty of drivers here in this port, or it is just stubs ? MMC, uart, usb, sdxc, i2c, gpio, fb, etc

Tue, Dec 26, 12:08 AM
br added a comment to D13625: sys/arm/lpc: Remove support for it.

ssd1289 is an external LCD controller and not a part of NXP LPC SoC. It may be useful for other boards.
May be we should move it somewhere?

Tue, Dec 26, 12:04 AM

Wed, Dec 20

br updated the diff for D13536: Set the address of translation table for thread0..

Read the TTBR0 register instead of calculating the value.
Suggested by andrew@.

Wed, Dec 20, 2:50 PM
br created P154 FreeBSD on Dragonboard 410c (Qualcomm Snapdragon 410E).
Wed, Dec 20, 2:22 PM

Tue, Dec 19

br updated the summary of D13536: Set the address of translation table for thread0..
Tue, Dec 19, 3:35 PM

Dec 18 2017

br created D13536: Set the address of translation table for thread0..
Dec 18 2017, 11:00 PM
br added a comment to D12875: Intel PT support.
In D12875#274809, @kib wrote:

My point is that currently we

  1. Do XSAVE (not XSAVES) at the context switch anyway.
  2. Add a sequence of RDMSRs and WRMSR on context switch in the patch, which is not free and adds the latency. If you combine the points 1 and 2, there is perhaps a possibility to avoid penalizing context switches in some situations.

    It might be not feasible for other reasons, but I believe that XSAVES is there exactly to optimize. At least the use of XSAVE should be considered.
Dec 18 2017, 8:58 PM

Dec 8 2017

br updated the diff for D12875: Intel PT support.

Add support for XSAVES/XRSTORS.

Dec 8 2017, 2:21 PM

Nov 22 2017

br added a comment to D12875: Intel PT support.
In D12875#273624, @kib wrote:

I have a rather global question about the driver design:

  1. Have you considered to use XSAVES to save the PT state on the context switch ? If yes, why did you decided not to use it ? Single XSAVES instruction instead of XSAVE, WRMSR to disable tracing and series of RDMSR to spill the state. Also, restore would be automatic.

I'm looking at this currently. But with XSAVES we still need to proceed a series of rdmsrs to fill registers, and then call xsaves. There are few values to save only, so how XSAVES help here? We still do a millions of instructions per context switch I guess.

Nov 22 2017, 4:17 PM
br committed rS326092: o Invalidate the correct page in pmap_protect()..
o Invalidate the correct page in pmap_protect().
Nov 22 2017, 2:11 PM
br updated the diff for D12875: Intel PT support.

style fix only.

Nov 22 2017, 11:06 AM
br added a comment to D12875: Intel PT support.
In D12875#273654, @kib wrote:
In D12875#273637, @br wrote:
In D12875#273624, @kib wrote:
  1. Why do you try to slip the tracing into pmc(4) framework at all ? I find it weird. May be your explanation change my opinion and I would not consider it unnatural. If it to have the hook for context switches, see #1.

I started with stand-alone driver for Intel PT, but then found we need:

  1. Symbols lookup (so user sees function names, not just IPs). For that we need to know where kernel and libraries mapped. HWPMC provides this functionality (mmap hooks in kernel and then fast lookup using hash tables in userspace).
  2. Function trace (vise-versa to 1). User specifies function name, we find where it is mapped, extract IPs, setup IP filter.
  3. Interrupt line number (including configuration, enable/disable) is the same as for PMC
  4. Virtual tracing (multiple clients are tracing their apps simultaneously).

    So based on this we found it quite natural fit to HWPMC

Ok. It answers why hpmc and pt should be one big pile of code. The rest of my notes are still valid, I believe.

Nov 22 2017, 11:04 AM

Nov 21 2017

br updated the diff for D12875: Intel PT support.

Rework memory allocation strategy:
o Use OBJT_PHYS pager. Fault handler is not required anymore
o Allocate memory using vm_page_alloc() (or vm_page_alloc_contig() if not possible)

Nov 21 2017, 6:49 PM

Nov 20 2017

br updated the diff for D12875: Intel PT support.

Remove pt_get_msr() as unrelated

Nov 20 2017, 9:45 AM

Nov 19 2017

br added a member for MIPS: br.
Nov 19 2017, 5:12 PM

Nov 18 2017

br added a comment to D12875: Intel PT support.
In D12875#273624, @kib wrote:
  1. Why do you try to slip the tracing into pmc(4) framework at all ? I find it weird. May be your explanation change my opinion and I would not consider it unnatural. If it to have the hook for context switches, see #1.
Nov 18 2017, 3:42 PM

Nov 17 2017

br updated the diff for D12875: Intel PT support.

specialreg.h changes committed

Nov 17 2017, 6:00 PM
br committed rS325952: Add Intel Processor Trace registers for:.
Add Intel Processor Trace registers for:
Nov 17 2017, 5:54 PM
br added inline comments to D12875: Intel PT support.
Nov 17 2017, 5:32 PM
br updated the diff for D12875: Intel PT support.

o Remove CR3 filter support as we don't need this on a current design. We enable PT on a switch_in and disable on switch_out. So CR3 is not required
o Use CPUPT_ prefix for PT CPUID macroses
o Move CPUPT_* macroses to CPUID section

Nov 17 2017, 5:28 PM
br added inline comments to D12875: Intel PT support.
Nov 17 2017, 3:40 PM
br updated the diff for D12875: Intel PT support.

restore specialreg.h changes

Nov 17 2017, 3:36 PM
br updated the diff for D12875: Intel PT support.

o Use DMAP_TO_PHYS((uint64_t)pmap->pm_pml4) as cr3
o Set cr3 in pt_configure() instead of pt_start()
o Do not use safe version of wrmsr
o Move PT regs to specialreg.h
o remove __FreeBSD_version check
o expand LIP to Linear IP
o fix segsize calculation for pt_buffer_allocate()

Nov 17 2017, 3:33 PM

Nov 12 2017

br added inline comments to D12875: Intel PT support.
Nov 12 2017, 11:18 PM
br updated the diff for D12875: Intel PT support.

specialreg.h committed

Nov 12 2017, 11:17 PM
br committed rS325747: Add Intel Processor Trace (PT) MSRs..
Add Intel Processor Trace (PT) MSRs.
Nov 12 2017, 11:13 PM

Nov 2 2017

br updated the diff for D12875: Intel PT support.

Use permissions 0666 for character devices /dev/pmc*, so virtual tracing is available for non-sudo user

Nov 2 2017, 9:19 AM
br updated the summary of D12875: Intel PT support.
Nov 2 2017, 9:13 AM

Nov 1 2017

br added inline comments to D12875: Intel PT support.
Nov 1 2017, 6:25 PM
br updated the diff for D12875: Intel PT support.

remove unneeded braces

Nov 1 2017, 3:20 PM
br updated the diff for D12875: Intel PT support.

Ensure TOPA_MULTI option is supported by CPU as we rely on it

Nov 1 2017, 3:14 PM
br added a dependent revision for D12815: Import libipt: D12875: Intel PT support.
Nov 1 2017, 3:07 PM
br added dependencies for D12875: Intel PT support: D12717: Import libipt, D12815: Import libipt.
Nov 1 2017, 3:07 PM
br added a dependent revision for D12717: Import libipt: D12875: Intel PT support.
Nov 1 2017, 3:07 PM
br added a reviewer for D12875: Intel PT support: markj.
Nov 1 2017, 3:06 PM
br updated the diff for D12875: Intel PT support.

free the SG buffers if some part of allocation failed

Nov 1 2017, 3:05 PM
br updated the diff for D12875: Intel PT support.

o Check if IP filter supported before using it
o Check if MTC packed supported before request it
o Check of TOPA tables supported before using PT

Nov 1 2017, 1:35 PM
br updated the diff for D12875: Intel PT support.

Check if CR3 filter support present in CPU before using it

Nov 1 2017, 11:25 AM
br updated the diff for D12875: Intel PT support.

Check if PT support present in CPU (cpu_stdext_feature & CPUID_STDEXT_PROCTRACE) before PMC allocation

Nov 1 2017, 11:21 AM
br updated the diff for D12875: Intel PT support.

fix macroses overflow (use UL to 64 bit)

Nov 1 2017, 10:45 AM
br updated the diff for D12875: Intel PT support.

remove unused header machine/pt.h

Nov 1 2017, 10:07 AM
br added a reviewer for D12875: Intel PT support: kib.
Nov 1 2017, 9:52 AM

Oct 31 2017

br added a reviewer for D12875: Intel PT support: emaste.
Oct 31 2017, 5:33 PM
br updated the summary of D12875: Intel PT support.
Oct 31 2017, 5:27 PM
br updated the summary of D12875: Intel PT support.
Oct 31 2017, 5:27 PM
br created D12875: Intel PT support.
Oct 31 2017, 5:23 PM

Oct 30 2017

br updated the diff for D12815: Import libipt.

change path

Oct 30 2017, 9:55 AM

Oct 28 2017

br updated the summary of D12815: Import libipt.
Oct 28 2017, 1:00 PM
br created D12815: Import libipt.
Oct 28 2017, 12:56 PM

Oct 27 2017

br added a comment to D12717: Import libipt.
In D12717#265981, @kib wrote:

Where is the upstream ? I only found Intel® Processor Trace Decoder Library.
I would appreciate if the review would be split into vendor import and contrib merge, and then the second review with the FreeBSD changes over contrib + build glue.

Oct 27 2017, 8:00 PM
br added a reviewer for D12717: Import libipt: jhb.
Oct 27 2017, 12:25 PM

Oct 24 2017

br committed rS324959: Extract a set of pmcstat functions and interfaces to the new internal.
Extract a set of pmcstat functions and interfaces to the new internal
Oct 24 2017, 4:28 PM
br closed D12718: add libpmcstat.
Oct 24 2017, 4:28 PM
br updated the diff for D12717: Import libipt.

wrap lines in lib/libipt/Makefile

Oct 24 2017, 1:21 PM
br added inline comments to D12718: add libpmcstat.
Oct 24 2017, 1:04 PM
br updated the diff for D12718: add libpmcstat.

remove dependency on curses.h for libpmcstat.h

Oct 24 2017, 1:04 PM
br added inline comments to D12718: add libpmcstat.
Oct 24 2017, 10:33 AM
br updated the diff for D12718: add libpmcstat.
  • wrap lines
  • use BEGIN/END_DECLS and group function declarations
  • move min/max
  • include _cpuset.h in libpmcstat.h
Oct 24 2017, 10:24 AM

Oct 23 2017

br updated the diff for D12718: add libpmcstat.
  • split libpmcstat
  • add new function pmcstat_symbol_search_by_name() allowing to find mapped IP for given function name
Oct 23 2017, 4:25 PM
br updated the diff for D12717: Import libipt.

Add IPT entries to src.libnames.mk, bsd.libnames.mk

Oct 23 2017, 9:34 AM

Oct 19 2017

br added inline comments to D12717: Import libipt.
Oct 19 2017, 2:07 PM

Oct 18 2017

br added inline comments to D12717: Import libipt.
Oct 18 2017, 1:56 PM
br updated the diff for D12717: Import libipt.

${LIBIPTSRC}/include/posix is not required in PATH

Oct 18 2017, 1:56 PM
br created D12718: add libpmcstat.
Oct 18 2017, 1:25 PM
br created D12717: Import libipt.
Oct 18 2017, 1:02 PM
br accepted D12707: Remove CPU_HAVEFPU..
Oct 18 2017, 10:02 AM

Oct 13 2017

br committed rS324598: o Support for Kabylake CPU PMCs (fall down to PMC_CPU_INTEL_SKYLAKE)..
o Support for Kabylake CPU PMCs (fall down to PMC_CPU_INTEL_SKYLAKE).
Oct 13 2017, 3:02 PM
br closed D12654: Support for Kabylake PMC.
Oct 13 2017, 3:02 PM
br updated the diff for D12654: Support for Kabylake PMC.

rework patch

Oct 13 2017, 1:27 PM
br updated the diff for D12654: Support for Kabylake PMC.

Indicate Intel document number CPU model comes from

Oct 13 2017, 12:34 PM
br created D12654: Support for Kabylake PMC.
Oct 13 2017, 12:30 PM

Aug 18 2017

br committed rS322660: Fix module unload when SGX support is not present in CPU..
Fix module unload when SGX support is not present in CPU.
Aug 18 2017, 2:47 PM

Aug 16 2017

br committed rS322578: Rename macro DEBUG to SGX_DEBUG..
Rename macro DEBUG to SGX_DEBUG.
Aug 16 2017, 1:45 PM
br committed rS322574: Add support for Intel Software Guard Extensions (Intel SGX)..
Add support for Intel Software Guard Extensions (Intel SGX).
Aug 16 2017, 10:38 AM
br closed D11113: Intel SGX driver by committing rS322574: Add support for Intel Software Guard Extensions (Intel SGX)..
Aug 16 2017, 10:38 AM
br updated the diff for D11113: Intel SGX driver.
  • Fix printf on vmem arena creation failure
  • Rename epc0 to epc in sgx_get_epc_page()
Aug 16 2017, 9:12 AM
br committed rS322571: Add OBJ_PG_DTOR flag to VM object..
Add OBJ_PG_DTOR flag to VM object.
Aug 16 2017, 8:49 AM
br closed D11688: Add OBJ_PG_DTOR flag to VM object by committing rS322571: Add OBJ_PG_DTOR flag to VM object..
Aug 16 2017, 8:49 AM

Aug 15 2017

br added inline comments to D11113: Intel SGX driver.
Aug 15 2017, 6:07 PM
br updated the diff for D11113: Intel SGX driver.
  • Destroy vmem on driver unload
Aug 15 2017, 6:06 PM
br updated the diff for D11113: Intel SGX driver.

Allocate EPC memory using vmem(9).

Aug 15 2017, 6:03 PM
br added a comment to D11688: Add OBJ_PG_DTOR flag to VM object.
In D11688#249549, @alc wrote:

I have no objections to this change. I'm just interested in hearing a little more about why it is needed. In your SGX driver are you essentially maintaining a private free page list for managing the pool of physical memory that backs enclaves?

Aug 15 2017, 2:49 PM
br updated the diff for D11113: Intel SGX driver.
  • Add a description of EPC page indexes in VM object queue
Aug 15 2017, 10:40 AM
br added inline comments to D11113: Intel SGX driver.
Aug 15 2017, 9:46 AM

Aug 14 2017

br updated the diff for D11113: Intel SGX driver.
  • Style: remove trailing space
Aug 14 2017, 3:45 PM
br updated the diff for D11113: Intel SGX driver.
  • Add simple comment in sgx_pg_fault
Aug 14 2017, 3:39 PM
br updated the diff for D11113: Intel SGX driver.
  • Sanity check the page we are adding is TCS or REG. We can't add other types of pages in IOCTL SGX_ADD_PAGE
Aug 14 2017, 3:26 PM
br added inline comments to D11113: Intel SGX driver.
Aug 14 2017, 3:19 PM
br added inline comments to D11113: Intel SGX driver.
Aug 14 2017, 3:13 PM
br updated the diff for D11113: Intel SGX driver.
  • Change p2 in the enclave lifecycle overview: indicate SECS pages stored at special index SGX_SECS_VM_OBJECT_INDEX (-1) in enclave's VM object queue.
Aug 14 2017, 2:37 PM
br added inline comments to D11113: Intel SGX driver.
Aug 14 2017, 2:33 PM
br added inline comments to D11113: Intel SGX driver.
Aug 14 2017, 2:30 PM
br updated the diff for D11113: Intel SGX driver.
  • Use special index SGX_SECS_VM_OBJECT_INDEX (-1) in VM object queue for SECS page
  • Change link to SDM (instead of old SGX manual dated 2014)
  • printf is for debugging only in sgx_pg_fault
Aug 14 2017, 2:25 PM
br committed rS322508: Rename RISC-V GCC config directory: riscv64 -> riscv.
Rename RISC-V GCC config directory: riscv64 -> riscv
Aug 14 2017, 2:17 PM

Aug 11 2017

br updated the diff for D11113: Intel SGX driver.
  • Add driver design overview
  • Remove enclave->mtx (unused)
  • Rename sc->mtx to sc->mtx_encls (use around ENCLS instructions only)
  • Add sc->mtx for sc->enclaves and sc->state access
Aug 11 2017, 3:57 PM