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o Add pmap lock around pmap_fault_fixup() to ensure other thread will not

Support RISC-V implementations that do not manage the A and D bits

Revert r339421 due to unintended files included to commit.

Support RISC-V implementations that do not manage the A and D bits

Remove unneeded parenthesis in pmap_fault_fixup()
Set PTE_X for a new entry in pmap_enter_quick_locked()

Invalidate TLB on a local hart.

Check if PTE is valid before setting A or D bits

Don't set PTE_A bit on a regular kernel mapping too

Don't set PTE_D bit even on kernel mappings of regular VM objects ahead of time
Don't call to vm_fault on PTE_A, PTE_D (2nd scheme) faults. Use pmap_fault_fixup() instead

Initialize interrupt priority to 0 on all sources.

Add support for the UART device found in lowRISC system-on-a-chip.

Fix issues pointed by markj

In D17424#371884, @jhb wrote:

Hmm, I think for this we want to actually wait to set PTE_A and PTE_D for user mappings until we get a fault? Presumably we'd want to check in the page fault handler if f the PTE was already valid before calling vm_fault and if it was set PTE_A (and PTE_D for a write) and then retry?

Setting PTE_A/PTE_D ahead of time for the kernel mappings to avoid the extra faults is certainly sensible (and the manual suggests it IIRC), but if we set them always for user mappings than the VM won't get the right feedback about which pages are accessed vs dirty.

Don't set A and D bits ahead of time of User mappings. Set them on fault

Fix build with GCC 8.1.

Enable VIMAGE support for RISC-V.

Use elf_relocaddr() to find the address for R_RISCV_RELATIVE

Don't mark module data as static on RISC-V.

Permit supervisor to access user VA space for certain functions only.

Fix bug: compare uaddr to VM_MAXUSER_ADDRESS, not to a tmp value

Enable 'C'-compressed ISA extension.

Add support for 'C'-compressed ISA extension to DTrace FBT provider.

Fix an integer overflow while setting the kernel address (MODINFO_ADDR).

Query MVPConf0.PVPE for number of CPUs.

Avoid repeated address calculation for malta_ap_boot.

Rewrite RISC-V disassembler:

Add RISC-V instructions encoding.

Implement uma_small_alloc(), uma_small_free().

Add a comment on why we pause the thread

I tested this on RISC-V. It boots multiuser fine.

Increase timeout for timedmutex_test:mutex2, timedmutex_test:mutex3

Return ENAMETOOLONG if the latest copied character

MAXLOGNAME changed to 33 in r243023.

Replace __riscv__ with __riscv.

Increase timeout for nop_test:stripesize.

Implement pt_fpreg_to_ucontext(), pt_ucontext_to_fpreg().

Save and restore floating-point arguments.

Don't overwrite tp in set_mcontext().

o Don't overwrite tp in fork_trampoline().

o Correctly set user tls base: consider TP_OFFSET.

Disable VIMAGE on RISC-V.

Use SPP (Supervisor Previous Privilege) bit in the sstatus

Disable OFED for RISC-V: it does not build.

Disable 'C'-compressed ISA extension.

Unused string removed

Remove unused string.

Fix setjmp for RISC-V:

PROFILE, TESTS and CXX build options are no longer broken for RISC-V.

Add a GCC 7.1.0 no-error warning flag.

update setjmp only for now

Add a GCC 8.1 warning flag.

br (Ruslan Bukin)
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