- User Since
- Jun 19 2014, 6:57 AM (187 w, 22 h)
Thu, Jan 11
Looks good to me as far as bnxt and iflib are concerned.
Wed, Dec 27
Thu, Dec 21
Wed, Dec 20
Dec 20 2017
Dec 19 2017
@olivier, this should work now.
Dec 18 2017
We can't call smp_topo() more than once.
Dec 11 2017
Dec 8 2017
Dec 7 2017
Dec 6 2017
This is by design. We won't have two rings on the same CPU waiting for each other... we're only waiting for other CPUs to catch up.
Dec 5 2017
Committed as r326578 (which had the wrong Differential Revision of D13269 specified).
Wrong URL pasted in D13324 commit. :-(
Integrate feedback from ae and cem
Dec 4 2017
Mark iflib_ether_pad() as noinline and move device_printf() into it
Move ether padding into spearate function, predict_false() the length test
Looks good, but I don't really like the title. I'm thinking of a commit message more like the following:
Return an error of m_append() fails, not success.
Dec 1 2017
Move BNXT_MIN_FRAME_SIZE into bnxt.h where D13269 defined BNXT_MIN_PKT_SIZE
So with D13312 committed, is there still a need for a change? If not, please abandon this review.
Nov 30 2017
Nov 29 2017
Fix non-SMP build
Add missing #ifdef
The ctx->ifc_cpus initialization change has been committed as
r326369, update patch to remove that change.
Adding mjg, since
Nov 28 2017
The rw lock stuff looks stable in HEAD now, so this should be testable against it.
Nov 27 2017
It's not clear how this change "Add[s] SR-IOV support for Stratus 100G NIC". A better description should be added.
Nov 23 2017
Nov 22 2017
Nov 21 2017
Ensure ifc_cpus is always initialized, even when msix is not used.
Nov 20 2017
And you try this after r326033? These issues could have been caused by the memory corruption fixed in that commit.
Nov 17 2017
Nov 16 2017
Nov 15 2017
with D13096 I've got only 12 queues assigned, no more NUMA mess :-)ix0: <Intel(R) PRO/10GbE PCI-Express Network Driver> port 0x2020-0x203f mem 0x91d00000-0x91dfffff,0x91e04000-0x91e07fff irq 44 at device 0.0 numa-domain 0 on pci5 ix0: using 2048 tx descriptors and 2048 rx descriptors ix0: msix_init qsets capped at 32 ix0: pxm cpus: 12 queue msgs: 63 admincnt: 1 ix0: using 12 rx queues 12 tx queues ix0: Using MSIX interrupts with 13 vectors ix0: allocated for 12 queues ix0: allocated for 12 rx queues ix0: Ethernet address: 24:6e:96:5b:92:80 ix0: PCI Express Bus: Speed 5.0GT/s Width x8 ix0: netmap queues/slots: TX 12/2048, RX 12/2048
But queue seems not bound to core (they jump to other cores, creating large standard derivation on the bench result), then I had to use an affinity script for best benefit:
Nov 14 2017
Update patch to current HEAD
Nov 13 2017
Nov 7 2017
committed as r325487
committed as r325488
Ah, you likely need to clear IFM_ETH_FMASK as well. I think that should be part of the default ifm_mask, but masking that off here should be good for now.
Nov 3 2017
Ah right, you likely need to mask off IFM_GMASK to remove the duplex/flow control bits as well... ifmedia_set(softc->media, ifmr->ifm_active & ~IFM_GMASK);
Nov 2 2017
This seems to be a very complex and fragile way of looking up the supported media type by speed. Why not just loop through ifm_list looking for a matching speed? Something like this:
Nov 1 2017
This looks like it would break the autoselect indication.
Oct 31 2017
Much better way of dropping a level of indentation. :-)