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adrian
obiwac
olce
ziaee

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manpages

Summary

Add driver for Intel Power Management Controller (PMC) found on Sunrise Point PCH chipsets.
This device exposes S0ix sleep state residency counters and power management status.

Sysctls provided:

dev.intelpmc.0.slp_s0_residency_us - Time in deepest sleep (us)
dev.intelpmc.0.ltr_ignore          - LTR ignore mask
dev.intelpmc.0.pm_cfg              - PM configuration register
dev.intelpmc.0.pm_sts              - PM status register
dev.intelpmc.0.access_denied       - Firmware lock status

Supported devices for now:

Sunrise Point-LP (0x9D21)
Sunrise Point-H (0xA121)

Note: Later PCH generations (Cannon Lake, Tiger Lake, ect.) have different PMC register layouts according to the datasheet and would need per-generation tables.
I avoided adding untested hardware in case they have a quirk.

Diff Detail

Repository

rG FreeBSD src repository

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Build Status

Buildable 70462
Build 67345: arc lint + arc unit

Event Timeline

There are a very large number of changes, so older changes are hidden. Show Older Changes

Addressed feedback:

SPDX first line, split copyright/description
Alphabetized includes and build files
Updated counter to 104us (empirical/Linux)
Refactored with pmc_read_safe() helper
Documented S0ix scope
Removed slp_s0_step member

Cannot test 0x8086:a121 without hardware yet. Will add more once i get them,

Harbormaster completed remote builds in B70460: Diff 171314.Feb 6 2026, 3:30 AM

Reverting to datasheet value (100us). Linux's 104us likely quirk on untested vendors.

Harbormaster completed remote builds in B70461: Diff 171317.Feb 6 2026, 3:42 AM

intel/intel_pmc_core: Remove unnecessary NULL check in detach

Harbormaster completed remote builds in B70462: Diff 171318.Feb 6 2026, 3:46 AM

Add man page, fix SPDX header order

Herald added a subscriber: ziaee. · View Herald TranscriptFeb 25 2026, 2:07 AM

Harbormaster completed remote builds in B70973: Diff 172638.Feb 25 2026, 2:07 AM

seuros mentioned this in D55495: intel_pmc_core: Add Intel PMC Core driver.Feb 25 2026, 2:08 AM

Factor reg32 sysctls into single handler, fix SLP_S0 description with reference

Harbormaster completed remote builds in B70974: Diff 172639.Feb 25 2026, 2:14 AM

seuros added inline comments.Mar 11 2026, 3:19 AM

sys/dev/intel/intel_pmc_core.c
159–160	0xFFFFFFFF is the standard PCIe "Unsupported Request" completion response, when the PMC MMIO BAR is locked or inaccessible (firmware disabled S0ix), the root complex returns all-ones for any read. I did read it from https://docs.kernel.org/PCI/pci-error-recovery.html Linux do the same : https://raw.githubusercontent.com/torvalds/linux/refs/heads/master/drivers/platform/x86/intel/pmc/core.c

olce added a reviewer: olce.Apr 9 2026, 7:02 PM

Hi Abdelkader,

Could you provide the output of acpidump -dt on your test machine? If that's too big for here or your prefer not to display it publicly, could you sent it to me (at olce@)?

Thanks.

The output is 125kb!

To avoid spamming everybody, i did send you it by email as requested.

Fell free to post relevant parts for others.

I know linux calls it a PMC core, but searching the web shows the rest of the world, including intel datasheets, does not use the term core. Searching the web for intel pmc core only shows unrelated things from intel, and the linux driver.

Does it make sense to maybe name it maybe something shorter and more descriptive like intel_pch_pmc? A more traditional BSD driver name might be pchpmc. Also, searching the web for pch pmc actually shows relevant datasheets from intel.

Is this driver different from what linux is doing? e.g. would it only confuse people looking for external resources if it had the same name?

OpenBSD calls their driver intelpmc. NetBSD doesn't appear to have one. I really like when it doesn't have underscores, most BSD drivers don't.

In D54881#1289335, @ziaee wrote:

OpenBSD calls their driver intelpmc. NetBSD doesn't appear to have one. I really like when it doesn't have underscores, most BSD drivers don't.

Fair! intelpmc then ?

I have more parts for this driver (i added new generations), but i want to have this landed before i diff the others.

Rename intel_pmc_core to intelpmc (no underscores, matches OpenBSD). Prefix static functions with intelpmc_. Update man page and build files.

Harbormaster completed remote builds in B72150: Diff 175336.Apr 12 2026, 10:47 AM

Fix man page: .Dt INTELPMC, drop 'Core' from description

Harbormaster completed remote builds in B72151: Diff 175337.Apr 12 2026, 10:49 AM

seuros retitled this revision from intel/intel_pmc_core: Add Intel PMC Core driver to intel/intelpmc: Add Intel PMC Core driver.Apr 12 2026, 12:07 PM

seuros edited the summary of this revision. (Show Details)

I'm going to land this today unless someone has any last minute objections!

In D54881#1289937, @adrian wrote:

I'm going to land this today unless someone has any last minute objections!

Please let me review/test tomorrow and land it. I'm working on testing S0ix on Intel.

Other than these nits, The manpage looks good to me. Maybe we should alphabetize the sysctls?

share/man/man4/intelpmc.4
1 ↗	(On Diff #175337)	This hyphen was for a long abandoned parser. I believe we have removed it from all our style guides, please let me know if this is not the case.
13–25 ↗	(On Diff #175337)	Optional: I proposed standardizing on this format on arch@ and in a BSDCan talk. We have nearly 200 manuals using this format, and it is more correct and consistent with the rest of the manual, as well as other BSDs, reinforcing the definition of SYNOPSIS to readers.
45 ↗	(On Diff #175337)	This section will appear on it's own in the hardware release note, so it is important that we add the context of what the list we're starting is.

adrian accepted this revision.Apr 12 2026, 7:02 PM

This revision is now accepted and ready to land.Apr 12 2026, 7:02 PM

oh one final comment - please put the code in sys/dev/intelpmc/, matching sys/modules/intelpmc/ .

If we end up with a lot of little intel drivers then we could relocate them all into sys/dev/intel/<driver>/, but I'm not so worried about that today.

Then fix ordering in modules/Makefile, then i'll land!

wait ignore me. There already IS stuff in sys/dev/intel/

Ok, ignore me. Lets just merge it.

In D54881#1290039, @adrian wrote:

wait ignore me. There already IS stuff in sys/dev/intel/

Ok, ignore me. Lets just merge it.

Hello?

In D54881#1290030, @olce wrote:

Please let me review/test tomorrow and land it. I'm working on testing S0ix on Intel.

oh oops! ok sorry yes please test it. i missed that!

Address review feedback.

This revision now requires review to proceed.Apr 13 2026, 1:01 AM

Harbormaster completed remote builds in B72162: Diff 175391.Apr 13 2026, 1:01 AM

seuros updated this revision to Diff 175392.Apr 13 2026, 1:04 AM

This comment was removed by seuros.

Harbormaster completed remote builds in B72163: Diff 175392.Apr 13 2026, 1:04 AM

seuros marked 3 inline comments as done.Apr 13 2026, 1:05 AM

share/man/man4/intelpmc.4
1–4 ↗	(On Diff #175392)	Please consider using the consistent style in all our style guides which is blank comment, copyright, blank comment, spdx, blank comment.
sys/dev/intel/intelpmc.c
1–5 ↗	(On Diff #175392)	copyright comes first, and no hyphen at the beginning.

Address review feedback

Harbormaster completed remote builds in B72167: Diff 175397.Apr 13 2026, 2:05 AM

Fix man page: SPDX before copyright

Harbormaster completed remote builds in B72168: Diff 175398.Apr 13 2026, 2:07 AM

Sorry, a bit late, (hopefully final) review tomorrow. In the meantime, it seems that a couple of suggestions by ziaee@ are still to be applied (although, personally, I wouldn't move the SPDX tag; I've never understood why it's not systematically in the first line, where it is easy to find to know the license without reading the text; having it after the text but before other comments looks to me as an unnecessary and inconvenient complication).

Some notes related to this work (no action required/requested).

I spent some time last Friday on similar topics, and asked Abdelkader his ACPI dump as I wanted to see if we could get the S0ix residency time in a uniform manner with a single manner, and avoid having a driver per PCH generation as Linux does (Linux seems to support a lot more functionality than just S0ix-related stuff) just to have this information. Also checked on some machines myself. Conclusion is: We probably could but it would be somewhat ad-hoc as Intel's LPIT specification doesn't seem to be fully respected in practice, with no Entry Trigger field matching a register in _CST; however, the GAS for the residency counter, when of a valid type, rightfully points to the actual memory where the SLP_S0 register is mapped (and on the machines I examined there is only one such GAS even when there are multiple LPIT entries). Anyway, having a driver per PCH generation is not a bad idea per se, we'll see what useful functionality other than S0ix information it can bring.

Also while I agree that we tend to have a style of not having underscores in driver names, and intelpmc exists on OpenBSD, I think this convention is really bad and looks a lot like cargo-culting (as I really do not see any significant advantage of it). Incidentally, we already have hwpstate_intel(4) and hwpstate_amd(4), and I'd wish all future drivers to rather use that kind of convention, which makes names easy to read.

In D54881#1290568, @olce wrote:

although, personally, I wouldn't move the SPDX tag; I've never understood why it's not systematically in the first line, where it is easy to find to know the license without reading the text; having it after the text but before other comments looks to me as an unnecessary and inconvenient complication).

This is not my idea, it's the recommendation of the style guide. (if it was my idea, no one would listen :P) -- https://docs.freebsd.org/en/articles/license-guide/

Also while I agree that we tend to have a style of not having underscores in driver names, and intelpmc exists on OpenBSD, I think this convention is really bad and looks a lot like cargo-culting (as I really do not see any significant advantage of it). Incidentally, we already have hwpstate_intel(4) and hwpstate_amd(4), and I'd wish all future drivers to rather use that kind of convention, which makes names easy to read.

For me, I just prefer we do whatever is most consistent. I like the traditional convention because its terse and consistent. I proposed several options, but I don't like using the exact name as the different linux driver, especially when it has an unnecessary and seemingly word at the end, and it's actively counterproductive in a google search because it doesn't use the same language as the datasheets, and produces entirely unrelated results except the confusingly similarly named linux driver.

@ziaee, the reason I put it on the second line was to keep it grepable. If you run head -n3 on driver files, you almost always land in the license header instead of anything useful, for example:
here and sys/fs/ext2fs/ext2_dir.h and many others.

Some files don't even have a license header at all, e.g. sys/arm64/arm64/bus_machdep.c.

PS: there are more files with the SPDX header , and my IDE show me warning because it don't follow the conventions most codebase had
coreboot
linux

The copyright line becomes problematic when there are multiple authors, since the license block keeps getting pushed further down.

The FreeBSD Project aims to produce a complete, BSD-licensed operating system allowing consumers of the system to produce derivative products without constraint or further license obligations.

A fork will inevitably change the structure once they start adding more contributors. Checking if someone altered the version, is not diffable.

I will update this diff and thermal once i get the naming is final.

In D54881#1290624, @guest-seuros wrote:

@ziaee, the reason I put it on the second line was to keep it grepable. If you run head -n3 on driver files, you almost always land in the license header instead of anything useful, for example:
here and sys/fs/ext2fs/ext2_dir.h and many others.

Some files don't even have a license header at all, e.g. sys/arm64/arm64/bus_machdep.c.

PS: there are more files with the SPDX header , and my IDE show me warning because it don't follow the conventions most codebase had
coreboot
linux

The copyright line becomes problematic when there are multiple authors, since the license block keeps getting pushed further down.

The FreeBSD Project aims to produce a complete, BSD-licensed operating system allowing consumers of the system to produce derivative products without constraint or further license obligations.

A fork will inevitably change the structure once they start adding more contributors. Checking if someone altered the version, is not diffable.

I will update this diff and thermal once i get the naming is final.

Again, I did not come up with this and I am not giving legal advice, I am just pointing out what is in style.9 and the license guide. All our docs request to use this style. Here are some links for your convenience.

https://man.freebsd.org/cgi/man.cgi?query=style&apropos=0&sektion=0&manpath=FreeBSD+16.0-CURRENT&format=html

https://docs.freebsd.org/en/articles/license-guide/

See inline comment, unless I'm somehow mistaken, register reading is wrong.

Also, what is the point of exposing PM_CFG? It does not seem to contain useful data with respect to S0ix, and in general not useful data at all as far as the OS is concerned. PM_STS is not even documented, and it's apparently used in Linux just to acknowledge messages sent to MTPMC (which we don't do), so I'd just remove it.

Finally, LTR_IGNORE is not documented either. It seems Linux only touches some bit there. It might be that some of the bits in there are of interest to know which S0ix are available, but am not sure. Do you have any documentation or pointers for that?

sys/dev/intel/intelpmc.c
130–148 ↗	(On Diff #175398)	This block, and in general, reads of the target registers look wrong. Taking the example of `SLP_S0_RES`, according to the documentation, it is part of the "PMC Memory Mapped Registers" range, whose address is to be obtained by looking up the `PWRMBASE` value in the device's PCI configuration space. Here, IIUC, you're directly applying the `SLP_S0_RES` offset to the PCI configuration space.

This revision now requires changes to proceed.Apr 14 2026, 8:35 PM

seuros mentioned this in D54882: intel_thermal: Add Intel Processor Thermal driver.Apr 16 2026, 11:37 AM

Harbormaster completed remote builds in B72391: Diff 175952.Apr 21 2026, 8:59 AM

remove sys/param.h accidentally added by IDE

Harbormaster completed remote builds in B72393: Diff 175954.Apr 21 2026, 9:06 AM

rename to intelpmc for consistency with hwpmc/intelspi

Harbormaster completed remote builds in B72394: Diff 175955.Apr 21 2026, 9:15 AM

for LTR_IGNORE.. each bit maps to an IP block (SPT has 18: SPA, SPB, SATA, ect).
A clear bit means that agent is asserting LTR requirements that can block S0ix entry.
When slp_s0_residency stops incrementing, the register tells you which device is in charge.

Linux exposes the same data in debugfs via pmc_core_ltr_show() for exactly this reason. I will add a comment in the source with the SPT bit map.

PS: I have other generations's support already tested. I will submit additional diffs once this driver land. (extra code used there was removed from this diff)

ziaee requested changes to this revision.May 1 2026, 8:19 PM

This revision now requires changes to proceed.May 1 2026, 8:19 PM

In D54881#1294250, @guest-seuros wrote:

rename to intelpmc for consistency with hwpmc/intelspi

I'd like moving into the easier-to-read direction. Could you please rename it back to intel_pmc? That's also more consistent with acpi_spmc(4).

In D54881#1294254, @guest-seuros wrote:

for LTR_IGNORE.. each bit maps to an IP block (SPT has 18: SPA, SPB, SATA, ect).
A clear bit means that agent is asserting LTR requirements that can block S0ix entry.

From my reading of Linux code, not exactly. It rather means that the corresponding IP *can* block S0ix entry. Do you confirm?

When slp_s0_residency stops incrementing, the register tells you which device is in charge.

From my reading of Linux code, it doesn't do that. It's rather that, if you don't get into S0ix, you can try to ignore IPs that would prevent from doing that.

So it seems to me that exposing LTR_IGNORE doesn't really make sense without write support (you'll have to change the corresponding sysctl).

PS: I have other generations's support already tested. I will submit additional diffs once this driver land. (extra code used there was removed from this diff)

I'm eager to see that, but first of all, let's make sure this base part is completely correct and usable.

share/man/man4/Makefile
258 ↗	(On Diff #175955)	Leakage of unrelated code.
share/man/man4/intelpmc.4
64–66 ↗	(On Diff #175955)	Intel's documentation is less affirmative/detailed: SLP_S0# is asserted "when PCH is idle and processor is in C10 state", so I'd employ instead their exact terms, especially for the manual page.
sys/dev/intel/intelpmc.c
28–33 ↗	(On Diff #175955)	Where do all these come from? From my own research, you could reference Linux commit 9c2ee19987ef02fe3dbe507d81ff5c7dd5bb4f21. But that is not enough: What does these mean? You could take inspiration from 2eb150558bb79ee01c39b64c2868216c0be2904f, at a minimum for documentation purposes. Reading them carefully, you'll then discover that this list is likely slightly wrong (11 is reserved, the rest is shifted, and `AGG` is not an hardware component and ignoring it makes no sense).
60 ↗	(On Diff #175955)	The mask is likely wrong (which shouldn't have consequences according to the doc, since the BAR size should be 0). Please check it again.

olce added inline comments.May 13 2026, 8:38 PM

sys/dev/intel/intelpmc.c
149 ↗	(On Diff #175955)	How could this lockdown happen? In the documentation, I see a "Power Management Data BAR Disable (`PM_DATA_BAR_DIS`)" bit in the documentation, with the indication that once locked reads to the MMIO area will always return 0 (and writes will be ignored). That seems at odds with testing for -1. Testing whether both registers are 0 could be deceiving, as both registers could perfectly be 0. Perhaps we could test directly for the bit I've just mentioned. Alternative: Read another MMIO location which we know cannot contain 0 (unless the MMIO region is locked).
130–148 ↗	(On Diff #175398)	Access to `SLP_S0` now looks OK. Do not hesitate to mark the previous comment (and this one) as "Done" in Phabricator, that makes it easier to keep track of changes still to do.

Address review: rename to intel_pmc, SPDX first, LTR_IGNORE writable, fix bit assignments, update man page, Note: early tests were done in vendor bios, the current tests are done in coreboot

Harbormaster completed remote builds in B73322: Diff 178342.May 21 2026, 7:28 PM

seuros marked 2 inline comments as done.May 21 2026, 7:30 PM

The manual looks great to me. Please use Relnotes: yes since this is a new driver, and tag me when this is ready to test on Alder Lake!

intel/intelpmc: Add Intel PMC Core driver
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sys/conf/files.x86

sys/dev/intel/intel_pmc_core.c

sys/modules/Makefile

sys/modules/intel_pmc_core/Makefile

intel/intelpmc: Add Intel PMC Core driverNeeds ReviewPublicActions

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sys/conf/files.x86

sys/dev/intel/intel_pmc_core.c

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sys/modules/intel_pmc_core/Makefile

intel/intelpmc: Add Intel PMC Core driver
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