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Add a gic interface to allocate MSI interrupts
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Authored by andrew on Sep 29 2021, 3:39 PM.
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Details

Summary

The previous update to handle the gicv2m as a child of the gicv3 driver
assumed there was only a single gicv2m child. On some hardware there
are multiple children. Support this by removing the mbi ivars and
adding a new interface to handle MSI allocation in a given range.

Test Plan

Tested on:

  • Parallels with GICv2 & GICv3 + GICv2M
  • VMWare Fusion with a GICv3 with MBI

Diff Detail

Repository
rG FreeBSD src repository
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Event Timeline

jrtc27 added inline comments.
sys/arm/arm/gic.c
1016–1017

I don't think these underscores really achieve much other than making it look a bit weird.

sys/arm/arm/gic.c
1016–1017

I just forgot to remove them when from when I also had both the old copy & this copy of the function.

This appears to fix kern/258534 for me, thanks :)

Tested on CN913x-DB, thanks!

This revision was not accepted when it landed; it landed in state Needs Review.Oct 1 2021, 10:28 AM
This revision was automatically updated to reflect the committed changes.