Add a gic interface to allocate MSI interrupts

[andrew]

Summary

The previous update to handle the gicv2m as a child of the gicv3 driver
assumed there was only a single gicv2m child. On some hardware there
are multiple children. Support this by removing the mbi ivars and
adding a new interface to handle MSI allocation in a given range.

Test Plan

Tested on:

• Parallels with GICv2 & GICv3 + GICv2M
• VMWare Fusion with a GICv3 with MBI

[jrtc27]

sys/arm/arm/gic.c

1016–1017

I don't think these underscores really achieve much other than making it look a bit weird.

[andrew]

sys/arm/arm/gic.c

1016–1017

I just forgot to remove them when from when I also had both the old copy & this copy of the function.

[trasz]

This appears to fix kern/258534 for me, thanks :)

[mw]

Tested on CN913x-DB, thanks!