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Differential D19706

Allow Kernel to link in both legacy libkern/zlib and new sys/contrib/zlib.
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Authored by delphij on Mar 26 2019, 2:43 AM.
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mmacy
ota_j.email.ne.jp
delphij
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rS350496: Allow Kernel to link in both legacy libkern/zlib and new sys/contrib/zlib,
Summary

The 1st large review have been separated into multiple pieces based on modules and functionalities.

This change-set updates the kernel to link both old and new ZLIB versions so that we can migrate one component at a time.

I created sys/dev/zlib directory to have some std compatible header files, also place kernel module C file, and kernel versions memory allocation functions like zcalloc, zcfree and few others.

Test Plan

% make buildkernel

Diff Detail

Repository
rS FreeBSD src repository - subversion
Lint
Lint Passed
Unit
No Test Coverage
Build Status
Buildable 25615
Build 24212: arc lint + arc unit

Event Timeline

There are a very large number of changes, so older changes are hidden. Show Older Changes
ota_j.email.ne.jp updated this revision to Diff 59136.Jun 27 2019, 11:23 PM

Added sys/contrib/zlib/crc32.c to zlib kernel module.

Harbormaster completed remote builds in B25100: Diff 59136.Jun 27 2019, 11:23 PM
delphij requested changes to this revision.Jul 1 2019, 4:40 PM
delphij added inline comments.
sys/conf/kern.pre.mk
178

The two additional -D's are only specified for zutil.c for sys/modules/zlib (kmod.mk version of ZLIB_CFLAGS don't have these). Since the sys/conf/files already have them, should they be removed here?

sys/dev/zlib/errno.h
1 ↗(On Diff #59136)

I still prefer a way to not use these "fake" headers (I can't really work on this until mid-July but will take a look as soon as I can).

sys/opencrypto/cryptodeflate.c
124

I think the probes needs to match their definitions? (Also, is there some specific reason not to convert this to use new zlib?)

This revision now requires changes to proceed.Jul 1 2019, 4:40 PM
ota_j.email.ne.jp added inline comments.Jul 5 2019, 10:50 AM
sys/conf/kern.pre.mk
178

The extra flags will be changed for Z_SOLO.

sys/dev/zlib/errno.h
1 ↗(On Diff #59136)

We can delay this action by using -DZ_SOLO. ZFS needs non Z_SOLO zlib and we can revisit that time.

sys/opencrypto/cryptodeflate.c
124

The probes need to be matching ABI, the binary symbol.
I can put cryptodefate changes together.
One of suggestion was break one large changeset into smaller ones; this one looks better be a part of this one to avoid changing probe names.

ota_j.email.ne.jp updated this revision to Diff 59436.Jul 5 2019, 10:56 AM

Use -DZ_SOLO to avoid standard C header files.
ZFS requires Non-Z_SOLO ZLIB and we will revisit when we work on ZFS.
Combined opencrypto conversion to avoid dtrace probe name changes.

Harbormaster completed remote builds in B25210: Diff 59436.Jul 5 2019, 10:56 AM
ota_j.email.ne.jp updated this revision to Diff 59455.Jul 5 2019, 10:50 PM

Drop -DMY_ZCALLOC as no use under -DZ_SOLO.

Harbormaster completed remote builds in B25215: Diff 59455.Jul 5 2019, 10:50 PM
ota_j.email.ne.jp updated this revision to Diff 59520.Jul 7 2019, 8:17 PM

Drop -DMY_ZCALLOC from kmod.mk but put zcfree() back.

Harbormaster completed remote builds in B25235: Diff 59520.Jul 7 2019, 8:17 PM
ota_j.email.ne.jp updated this revision to Diff 59521.Jul 7 2019, 8:19 PM

Missed zcallc.h/c files from last update.

Harbormaster completed remote builds in B25236: Diff 59521.Jul 7 2019, 8:19 PM
ota_j.email.ne.jp updated this revision to Diff 59522.Jul 7 2019, 8:21 PM

I had missed zcalloc.c in sys/modules/Makefile, too.

Harbormaster completed remote builds in B25237: Diff 59522.Jul 7 2019, 8:21 PM
ota_j.email.ne.jp updated this revision to Diff 59524.Jul 7 2019, 8:29 PM

Drop NO_GZIP compile option changes in zlib as these aren't necessary at this stage.

Harbormaster completed remote builds in B25238: Diff 59524.Jul 7 2019, 8:30 PM
delphij added a comment.Jul 8 2019, 9:25 PM

Thanks! This looks mostly good to me. I intend to commit this version with some minor tweaks after some testing in a day or two, so please yell if you don't agree with some change proposals (commented inline).

sys/contrib/zlib/zconf.h
442–443

This seems to be my bad (rS206708 derived from vendor 7147f24cd7b27dd95f6e841851a111cb311a9c07).

Initially, in rS205306, we #if 0'ed Z_HAVE_UNISTD_H, which used to determine if we would include sys/types.h. Later, the upstream have decided to include it for all platforms, and sys/types.h was included again, so when upgrading zlib I have decided to just take it and removed the include below, right before our hardcoded configuration.

May I ask a favor that we revert the change here to vendor version, and instead, add a block of:

#ifdef Z_SOLO
#  include <sys/types.h>      /* for off_t */
#endif

under "This is hard-configured for FreeBSD." so we keep the local changes together? Potentially, that would make it easier for future upgrades.

sys/opencrypto/cryptodeflate.c
63

the new line before crypto_zalloc() is not necessary.

64

[OPTIONAL] Personally I'd remove the variable names in prototype definition. Alternatively, you can move these functions' bodies here because these are static functions.

sys/sys/zlib.h
99

[OPTIONAL] I wonder if we can make deflate_copyright and inflate_copyright in sys/libkern/zlib.c static instead?

delphij accepted this revision.Jul 8 2019, 9:25 PM
ota_j.email.ne.jp added inline comments.Jul 9 2019, 9:44 AM
sys/contrib/zlib/zconf.h
442–443

Ok.

sys/opencrypto/cryptodeflate.c
64

I will move implementations here.

sys/sys/zlib.h
99

It appeared that these 2 variables are not used at all. Converting to static variable resulted in error.

ota_j.email.ne.jp updated this revision to Diff 59565.Jul 9 2019, 9:49 AM

Adjusted sys/type.h include to FreeBSD section and also moved crypto_z* function implementations to top of file.

Harbormaster completed remote builds in B25262: Diff 59565.Jul 9 2019, 9:49 AM
ota_j.email.ne.jp updated this revision to Diff 59717.Jul 13 2019, 12:41 AM

Disable broken gzipped aout executable support and rename zlib in ZFS to avoid filename conflicts.

gzipped aout supports has been broken for more than few years now. Disable it to avoid inflate() ABI conflict. I'm interested in reimplementing it with zlib but it will be one of the last zlib update processes.

Add opensolaris_ prefix to zlib files in ZFS to avoid object filename conflicts. Zlib in ZFS is compiled with different options and they are not ABI compatible.
This will also address https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=205822

These changes address link errors found by LINT:
% make buildLINT
% make buildkernel KERNCONF=LINT

Harbormaster completed remote builds in B25328: Diff 59717.Jul 13 2019, 12:41 AM
ota_j.email.ne.jp added a comment.Jul 15 2019, 4:30 AM

Actually, this file rename doesn't fix https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=205822.
I don't think it is worth addressing this bug report here as removing the zlib in zfs also fixes this issue and we are aiming for this serious of changes.

ota_j.email.ne.jp added a comment.Jul 28 2019, 8:20 PM

D21072, "Remove support for kernel.tramp and kernel.tramp.gz", precedes this revision. This removes obsolete use of legacy zlib version.

ota_j.email.ne.jp updated this revision to Diff 60312.Jul 30 2019, 10:49 PM

D21099 removed gzip'ed a.out support. Rebased and adjusted.

Harbormaster completed remote builds in B25611: Diff 60312.Jul 30 2019, 10:49 PM
delphij updated this revision to Diff 60316.Jul 31 2019, 5:16 AM

Rebase.

Harbormaster completed remote builds in B25613: Diff 60316.Jul 31 2019, 5:16 AM
delphij updated this revision to Diff 60318.Jul 31 2019, 5:44 AM

Add license plate for sys/dev/zlib/zlib_mod.c.

Harbormaster completed remote builds in B25614: Diff 60318.Jul 31 2019, 5:44 AM
delphij added a reviewer: markm.Jul 31 2019, 5:50 AM
delphij added a subscriber: markm.

+@markm (Please confirm if the license is Okay for sys/dev/zlib/zlib_mod.c, the file is largely based on your change rS130799 in 2004 for sys/net/zlib.c).

sys/dev/zlib/zcalloc.c
2

A license plate should be added.

sys/dev/zlib/zcalloc.h
2

A license plate should be added.

delphij added reviewers: ZFS, mav, avg, mmacy.Jul 31 2019, 6:03 AM
delphij added subscribers: mmacy, avg.

+@mav @avg @mmacy for ZFS portion of change as a FYI (sys/cddl/contrib/opensolaris/uts/common/zmod). TL;DR: the bundled zlib (1.2.3) was removed in favor of new zlib; alloc/free functions merged from zmod_subr.c into zmod.c.

markm accepted this revision.Jul 31 2019, 7:20 AM

LGTM otherwise.

sys/dev/zlib/zlib_mod.c
2

This file is 99.999% boilerplate; I'm happy for the copyright to revert to FreeBSD Foundation without mentioning me.

delphij updated this revision to Diff 60319.Jul 31 2019, 7:43 AM

Modified zlib_mod.c to use standard FreeBSD Foundation license.

Harbormaster completed remote builds in B25615: Diff 60319.Jul 31 2019, 7:43 AM
ota_j.email.ne.jp added a comment.Jul 31 2019, 11:07 PM

It looks ZFS changes, dropping zlib files in zfs, are melded into this one.
I recall needing to add -DGZIP and/or -DGUNZIP option for zfs compression=gzip to properly uncompress gzipped zfs devices with older version; there was gzip header regression...

I'd like to test to ensure I can read zfs with compresssion=gzip from 12-RELEASE.

sys/dev/zlib/zcalloc.c
2

Please use
/* This file is in the public domain. */

It is a clone of multiple copies of same functions.

sys/dev/zlib/zcalloc.h
2

Please use
/* This file is in the public domain. */

It is a clone of multiple copies of same functions.

ota_j.email.ne.jp added a comment.Aug 1 2019, 5:09 AM

I tested reads and writes on gzipped ZFS between 12.0-RELEASE and 13-CURRENT with this changes.
The test result was good.

Do we need to bump kernel version for this change like we did for gzip'ed a.out support removal?

delphij updated this revision to Diff 60351.Aug 1 2019, 6:26 AM

Update license for zcalloc;

Fix tinderbox build (needs upstream).

Harbormaster completed remote builds in B25628: Diff 60351.Aug 1 2019, 6:26 AM
delphij accepted this revision.Aug 1 2019, 6:36 AM
delphij commandeered this revision.Aug 1 2019, 6:43 AM
delphij accepted this revision.
delphij edited reviewers, added: ota_j.email.ne.jp; removed: delphij.

Submitted as rS350496.

ota_j.email.ne.jp accepted this revision.Aug 3 2019, 2:27 PM
This revision was not accepted when it landed; it landed in state Needs Review.Aug 6 2019, 1:32 PM
Closed by commit rS350496: Allow Kernel to link in both legacy libkern/zlib and new sys/contrib/zlib, (authored by delphij). · Explain Why
This revision was automatically updated to reflect the committed changes.
delphij added a commit: rS350496: Allow Kernel to link in both legacy libkern/zlib and new sys/contrib/zlib,.
ota_j.email.ne.jp mentioned this in D21175: bxe to update zlib version 1.0.4 to 1.2.11..Aug 7 2019, 4:28 AM
ota_j.email.ne.jp mentioned this in D21176: DDB_CTF to update zlib version 1.0.4 to 1.2.11.Aug 7 2019, 4:45 AM

Revision Contents
Changeset List

PathSize
sys/
cddl/
contrib/
opensolaris/
uts/
common/
fs/
zfs/
1 line
zmod/
46 lines
conf/
2 lines
44 lines
4 lines
2 lines
contrib/
zlib/
2 lines
3 lines
3 lines
dev/
zlib/
8 lines
27 lines
dev/
zlib/
libkern/
5411 lines
libkern/
42 lines
modules/
crypto/
1 line
zfs/
10 lines
zlib/
20 lines
opencrypto/
46 lines
4 lines
sys/
64 lines

Diff 60319

View Options

sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
▲ Show 20 Lines • Show All 131 Lines • ▼ Show 20 Lines
struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
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}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/adler32.c

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
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* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
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struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
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}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/crc32.h

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
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* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
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struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
Show All 12 Lines
}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/deflate.h

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
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* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
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struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
Show All 12 Lines
}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/deflate.c

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
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* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
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struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
Show All 12 Lines
}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/inffast.h

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines#define __PMC_CPUS() \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
__PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
__PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \ __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
__PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \ __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
__PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \ __PMC_CPU(INTEL_BROADWELL_XEON, 0x97, "Intel Broadwell Xeon") \
__PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \ __PMC_CPU(INTEL_SKYLAKE, 0x98, "Intel Skylake") \
__PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \ __PMC_CPU(INTEL_SKYLAKE_XEON, 0x99, "Intel Skylake Xeon") \
__PMC_CPU(INTEL_KABYLAKE, 0x9A, "Intel Kabylake") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
__PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \ __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
__PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
__PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
__PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
__PMC_CPU(GENERIC, 0x400, "Generic") \ __PMC_CPU(GENERIC, 0x400, "Generic") \
Show All 34 Lines#define __PMC_CLASSES() \
__PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \ __PMC_CLASS(MIPS24K, 0x0B, "MIPS 24K") \
__PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \ __PMC_CLASS(OCTEON, 0x0C, "Cavium Octeon") \
__PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \ __PMC_CLASS(PPC7450, 0x0D, "Motorola MPC7450 class") \
__PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \ __PMC_CLASS(PPC970, 0x0E, "IBM PowerPC 970 class") \
__PMC_CLASS(SOFT, 0x0F, "Software events") \ __PMC_CLASS(SOFT, 0x0F, "Software events") \
__PMC_CLASS(ARMV7, 0x10, "ARMv7") \ __PMC_CLASS(ARMV7, 0x10, "ARMv7") \
__PMC_CLASS(ARMV8, 0x11, "ARMv8") \ __PMC_CLASS(ARMV8, 0x11, "ARMv8") \
__PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \ __PMC_CLASS(MIPS74K, 0x12, "MIPS 74K") \
__PMC_CLASS(E500, 0x13, "Freescale e500 class") __PMC_CLASS(E500, 0x13, "Freescale e500 class") \
__PMC_CLASS(PT, 0x14, "Intel PT") \
__PMC_CLASS(CORESIGHT, 0x15, "ARM Coresight")
enum pmc_class { enum pmc_class {
#undef __PMC_CLASS #undef __PMC_CLASS
#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, #define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
__PMC_CLASSES() __PMC_CLASSES()
}; };
#define PMC_CLASS_FIRST PMC_CLASS_TSC #define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_E500 #define PMC_CLASS_LAST PMC_CLASS_CORESIGHT
/* /*
* A PMC can be in the following states: * A PMC can be in the following states:
* *
* Hardware states: * Hardware states:
* DISABLED -- administratively prohibited from being used. * DISABLED -- administratively prohibited from being used.
* FREE -- HW available for use * FREE -- HW available for use
* Software states: * Software states:
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* The system-wide "global" modes keep the PMCs running all the time * The system-wide "global" modes keep the PMCs running all the time
* and are used to measure the behaviour of the whole system. * and are used to measure the behaviour of the whole system.
*/ */
#define __PMC_MODES() \ #define __PMC_MODES() \
__PMC_MODE(SS, 0) \ __PMC_MODE(SS, 0) \
__PMC_MODE(SC, 1) \ __PMC_MODE(SC, 1) \
__PMC_MODE(TS, 2) \ __PMC_MODE(TS, 2) \
__PMC_MODE(TC, 3) __PMC_MODE(TC, 3) \
__PMC_MODE(ST, 4) \
__PMC_MODE(TT, 5)
enum pmc_mode { enum pmc_mode {
#undef __PMC_MODE #undef __PMC_MODE
#define __PMC_MODE(M,N) PMC_MODE_##M = N, #define __PMC_MODE(M,N) PMC_MODE_##M = N,
__PMC_MODES() __PMC_MODES()
}; };
#define PMC_MODE_FIRST PMC_MODE_SS #define PMC_MODE_FIRST PMC_MODE_SS
#define PMC_MODE_LAST PMC_MODE_TC #define PMC_MODE_LAST PMC_MODE_TC
#define PMC_IS_COUNTING_MODE(mode) \ #define PMC_IS_COUNTING_MODE(mode) \
((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
#define PMC_IS_SYSTEM_MODE(mode) \ #define PMC_IS_SYSTEM_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC || (mode) == PMC_MODE_ST)
#define PMC_IS_SAMPLING_MODE(mode) \ #define PMC_IS_SAMPLING_MODE(mode) \
((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
#define PMC_IS_VIRTUAL_MODE(mode) \ #define PMC_IS_VIRTUAL_MODE(mode) \
((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC || (mode) == PMC_MODE_TT)
/* /*
* PMC row disposition * PMC row disposition
*/ */
#define __PMC_DISPOSITIONS(N) \ #define __PMC_DISPOSITIONS(N) \
__PMC_DISP(STANDALONE) /* global/disabled counters */ \ __PMC_DISP(STANDALONE) /* global/disabled counters */ \
__PMC_DISP(FREE) /* free/available */ \ __PMC_DISP(FREE) /* free/available */ \
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines#define __PMC_OPS() \
__PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
__PMC_OP(PMCRELEASE, "Release a PMC") \ __PMC_OP(PMCRELEASE, "Release a PMC") \
__PMC_OP(PMCRW, "Read/Set a PMC") \ __PMC_OP(PMCRW, "Read/Set a PMC") \
__PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
__PMC_OP(PMCSTART, "Start a PMC") \ __PMC_OP(PMCSTART, "Start a PMC") \
__PMC_OP(PMCSTOP, "Stop a PMC") \ __PMC_OP(PMCSTOP, "Stop a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file") \ __PMC_OP(WRITELOG, "Write a cookie to the log file") \
__PMC_OP(CLOSELOG, "Close log file") \ __PMC_OP(CLOSELOG, "Close log file") \
__PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") \
__PMC_OP(LOG_KERNEL_MAP, "Log kernel mappings") \
__PMC_OP(THREAD_UNSUSPEND, "Thread unsuspend") \
__PMC_OP(TRACE_READ, "Read trace buffer pointer") \
__PMC_OP(TRACE_CONFIG, "Setup trace IP ranges")
enum pmc_ops { enum pmc_ops {
#undef __PMC_OP #undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N, #define __PMC_OP(N, D) PMC_OP_##N,
__PMC_OPS() __PMC_OPS()
}; };
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struct pmc_op_pmcrw { struct pmc_op_pmcrw {
uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
pmc_id_t pm_pmcid; /* pmc id */ pmc_id_t pm_pmcid; /* pmc id */
pmc_value_t pm_value; /* new&returned value */ pmc_value_t pm_value; /* new&returned value */
}; };
/* /*
* OP GETPMCINFO * OP GETPMCINFO
* *
* retrieve PMC state for a named CPU. The caller is expected to * retrieve PMC state for a named CPU. The caller is expected to
* allocate 'npmc' * 'struct pmc_info' bytes of space for the return * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
* values. * values.
*/ */
Show All 9 Linesstruct pmc_info {
pmc_value_t pm_reloadcount; /* sampling counters only */ pmc_value_t pm_reloadcount; /* sampling counters only */
}; };
struct pmc_op_getpmcinfo { struct pmc_op_getpmcinfo {
int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
}; };
/*
* OP PROC_UNSUSPEND
*
* Unsuspend all threads of proc.
*/
struct pmc_op_proc_unsuspend {
pmc_id_t pm_pmcid;
pid_t pm_pid;
};
/* /*
* OP TRACE_CONFIG
*/
#define PMC_FILTER_MAX_IP_RANGES 4
struct pmc_op_trace_config {
pmc_id_t pm_pmcid;
uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
uint64_t ranges[2 * PMC_FILTER_MAX_IP_RANGES];
uint32_t nranges;
};
/*
* OP TRACE_READ
*/
struct pmc_op_trace_read {
pmc_id_t pm_pmcid;
uint32_t pm_cpu;
pmc_value_t pm_cycle; /* returned value */
pmc_value_t pm_offset; /* returned value */
};
/*
* OP GETCPUINFO * OP GETCPUINFO
* *
* Retrieve system CPU information. * Retrieve system CPU information.
*/ */
struct pmc_classinfo { struct pmc_classinfo {
enum pmc_class pm_class; /* class id */ enum pmc_class pm_class; /* class id */
uint32_t pm_caps; /* counter capabilities */ uint32_t pm_caps; /* counter capabilities */
uint32_t pm_width; /* width of the PMC */ uint32_t pm_width; /* width of the PMC */
uint32_t pm_num; /* number of PMCs in class */ uint32_t pm_num; /* number of PMCs in class */
}; };
struct pmc_op_getcpuinfo { struct pmc_op_getcpuinfo {
▲ Show 20 Lines • Show All 468 Lines • ▼ Show 20 Linesstruct pmc_classdep {
int pcd_ri; /* row index of the first PMC in class */ int pcd_ri; /* row index of the first PMC in class */
int pcd_width; /* width of the PMC */ int pcd_width; /* width of the PMC */
/* configuring/reading/writing the hardware PMCs */ /* configuring/reading/writing the hardware PMCs */
int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
/* trace */
int (*pcd_read_trace)(int _cpu, int _ri, struct pmc *_pm,
pmc_value_t *_cycle, pmc_value_t *_offset);
int (*pcd_trace_config)(int _cpu, int _ri, struct pmc *_pm,
uint64_t *ranges, uint32_t nranges);
/* pmc allocation/release */ /* pmc allocation/release */
int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
const struct pmc_op_pmcallocate *_a); const struct pmc_op_pmcallocate *_a);
int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
/* starting and stopping PMCs */ /* starting and stopping PMCs */
int (*pcd_start_pmc)(int _cpu, int _ri); int (*pcd_start_pmc)(int _cpu, int _ri);
Show All 12 Lines
}; };
/* /*
* struct pmc_mdep * struct pmc_mdep
* *
* Machine dependent bits needed per CPU type. * Machine dependent bits needed per CPU type.
*/ */
struct pmc_mdep { struct pmc_mdep {
uint32_t pmd_cputype; /* from enum pmc_cputype */ uint32_t pmd_cputype; /* from enum pmc_cputype */
uint32_t pmd_npmc; /* number of PMCs per CPU */ uint32_t pmd_npmc; /* number of PMCs per CPU */
uint32_t pmd_nclass; /* number of PMC classes present */ uint32_t pmd_nclass; /* number of PMC classes present */
/* /*
* Machine dependent methods. * Machine dependent methods.
*/ */
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sys/cddl/contrib/opensolaris/uts/common/zmod/inffixed.h

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