hwpmc: add RAPL energy-counter class (AMD + Intel)
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Authored by afscoelho_gmail.com on Fri, Jul 3, 6:00 PM.

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Reviewers

ali_mashtizadeh.com
gnn
mhorne
alfredo
janeri_gmail.com
raghavendra.kt_amd.com
aokblast
bnovkov

Group Reviewers

pmc

Summary

Add hwpmc_rapl.c/.h implementing PMC_CLASS_RAPL, a read-only
system-scope class modeled on TSC and wired into x86 AMD and Intel MD
init. A per-vendor MSR table covers AMD/Hygon and Intel; energy is
reported in microjoules, with the Intel server 2^-16 J DRAM unit
handled and 32-bit wraps recovered into a 64-bit accumulator.

The overflow guard follows the PMC lifetime: armed on the first
allocated PMC, callout_drain()d on the last release, and each tick only
rendezvouses CPUs holding one. Per-CPU spin locks guard the accumulator
against torn reads on i386. PMC_CAP_DOMWIDE lets pmcstat(8) allocate
one counter per NUMA domain instead of per CPU.

Diff Detail

Repository

rG FreeBSD src repository

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Build Status

Buildable 74510
Build 71393: arc lint + arc unit

Event Timeline

afscoelho_gmail.com created this revision.Fri, Jul 3, 6:00 PM

Herald added a reviewer: gnn. · View Herald TranscriptFri, Jul 3, 6:00 PM

Herald added a subscriber: imp. · View Herald Transcript

afscoelho_gmail.com requested review of this revision.Fri, Jul 3, 6:00 PM

afscoelho_gmail.com added a parent revision: D58027: x86: add AMD RAPL MSR definitions to specialreg.h.

afscoelho_gmail.com added a child revision: D58029: libpmc: userland support and pmc.rapl.3 for the RAPL class.

Harbormaster completed remote builds in B74510: Diff 181267.Fri, Jul 3, 6:00 PM

afscoelho_gmail.com added reviewers: mhorne, alfredo, janeri_gmail.com, raghavendra.kt_amd.com, pmc.Fri, Jul 3, 6:15 PM

afscoelho_gmail.com mentioned this in D55603: amdrapl: Introduce amdrapl driver.Fri, Jul 3, 6:30 PM

aokblast added reviewers: aokblast, bnovkov.Sat, Jul 4, 6:47 PM

ali_mashtizadeh.com added inline comments.Sat, Jul 4, 8:28 PM

sys/dev/hwpmc/hwpmc_amd.c
1134	You should probably check the cpuid flag for the AMD's RAPL and decide whether you initialize it at all.
sys/dev/hwpmc/hwpmc_intel.c
283	Again, I think this is dependent on the cpuid for thermal sensors.
sys/dev/hwpmc/hwpmc_rapl.c
144	Ah you have a circular dependency between the two functions can you move this definition to the top of the file.
192	This is already done for all system mode PMC's by the common infrastructure.
509	Ah I didn't realize you were checking if the counters exist in your add function that looks good, but still think we shouldn't add the class if there's no counters present.
541	I think amd and intel also have integrated gpu power reporting. Should be a couple extra lines if you look at on of the APU PPRs.
sys/i386/include/pmc_mdep.h
50	RAPL...