libpmc: userland support and pmc.rapl.3 for the RAPL class

[afscoelho_gmail.com]

Summary

Register PMC_CLASS_RAPL in libpmc: event table, allocator, class-table
descriptor, and the event-name/class-listing lookups, all x86-guarded
and modeled on the TSC class. Energy events are read-only and
unqualified. The class prefix (RAPL-) supplies the friendly spelling, so
pmcstat -S rapl-energy-pkg resolves to the canonical ENERGY_PKG event.

Add a pmc.rapl.3 manual page documenting the events, counter scope, the
microjoule unit and wrap handling, and the NUMA/package domain mapping;
link it from pmc.3.

[ali_mashtizadeh.com]

lib/libpmc/pmc.rapl.3

28

sentence after the semicolon doesn't follow. If your talking about the bug fix drop it?

41

Maybe something close to: The RAPL PMC driver provides a virtual 64-bit counter that is guaranteed to be monotonic, by periodically sampling the 32-bit hardware counters that wrap frequently. Saying the kernel folds them is awkward.

[mhorne]

lib/libpmc/libpmc.c

895

Are the casts needed?

899

[afscoelho_gmail.com]

Address review feedback: drop the unneeded (int) casts on pe in rapl_allocate_pmc, since the RAPL bounds are enum pmc_event members (mhorne); reword the microjoule-scaling sentence and describe wrap handling as a virtual 64-bit counter in pmc.rapl.3 (ali_mashtizadeh).

[afscoelho_gmail.com]

Address review: use explicit 'ctrspec != NULL' in rapl_allocate_pmc (mhorne, style(9)).

[afscoelho_gmail.com]

lib/libpmc/libpmc.c

895

No, they are not! I copied this from soft_allocate_pmc and didn't check, thanks for the warning !

lib/libpmc/pmc.rapl.3

28

right, I reworded it.

41

I did as you suggested, thanks!

[mhorne]

lib/libpmc/pmc.rapl.3

2–5