Some SoCs have an external firmware doing power management, clock
and other stuffs. (Xilinx, ARM Juno etc ...)
The way it is represent in the DTB is usually having a 'firmware' node
under the root node and have some nodes under it with the correct
compatible strings.
The firmware node itself doesn't have any compatible strings.
This driver is simple subclassed from simplebus and attaches at
BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE so early drivers (like clock drivers)
can still have a change to attach early.
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