Page MenuHomeFreeBSD

andrew (Andrew Turner)
User

Projects

User Details

User Since
May 10 2014, 2:21 PM (578 w, 23 h)

Recent Activity

Fri, Jun 6

andrew requested review of D50726: arm64: Add more CPU MIDR values.
Fri, Jun 6, 5:21 PM

Mon, Jun 2

andrew updated the diff for D49710: arm64: Enable pointer authentication with QARMA3.

Rebase and add a comment above update_special_reg

Mon, Jun 2, 11:00 AM
andrew committed rG89bb17ec3b02: arm64: Mask out the PAC ID fields when disabled (authored by andrew).
arm64: Mask out the PAC ID fields when disabled
Mon, Jun 2, 10:42 AM
andrew committed rG2aeac25bcb72: arm64: Add a function to restrict the ID registers (authored by andrew).
arm64: Add a function to restrict the ID registers
Mon, Jun 2, 10:42 AM
andrew committed rG38fd088a5db2: arm64: Move users of sanitised ID registers later (authored by andrew).
arm64: Move users of sanitised ID registers later
Mon, Jun 2, 10:42 AM
andrew closed D50573: arm64: Mask out the PAC ID fields when disabled.
Mon, Jun 2, 10:42 AM
andrew closed D50572: arm64: Add a function to restrict the ID registers.
Mon, Jun 2, 10:42 AM
andrew closed D50571: arm64: Move users of sanitised ID registers later.
Mon, Jun 2, 10:42 AM

Fri, May 30

andrew updated the diff for D50573: arm64: Mask out the PAC ID fields when disabled.

Remove unneeded braces

Fri, May 30, 10:12 AM

Wed, May 28

andrew accepted D50574: restore #include <sys/devmap.h>.

they should be in GENERIC if able (or at lease something tinderbox would build).

Wed, May 28, 3:41 PM · ARM
andrew requested review of D50573: arm64: Mask out the PAC ID fields when disabled.
Wed, May 28, 1:41 PM
andrew requested review of D50572: arm64: Add a function to restrict the ID registers.
Wed, May 28, 1:41 PM
andrew requested review of D50571: arm64: Move users of sanitised ID registers later.
Wed, May 28, 1:40 PM
andrew committed rG88365ff691f1: hwpmc/arm64: The counter is 64-bit (authored by andrew).
hwpmc/arm64: The counter is 64-bit
Wed, May 28, 1:36 PM
andrew committed rG1bf4adf8cc9a: hwpmc/arm64: Hard code the initial pmcr state (authored by andrew).
hwpmc/arm64: Hard code the initial pmcr state
Wed, May 28, 1:36 PM
andrew committed rG166d8e4f4786: hwpmc/arm64: Support 64-bit counters (authored by andrew).
hwpmc/arm64: Support 64-bit counters
Wed, May 28, 1:36 PM
andrew committed rG48d41181ee1d: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit (authored by andrew).
hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit
Wed, May 28, 1:36 PM
andrew committed rG33ec71d6c0e9: arm64: Add more PMCR_EL0 fields (authored by andrew).
arm64: Add more PMCR_EL0 fields
Wed, May 28, 1:36 PM
andrew closed D50434: hwpmc/arm64: Hard code the initial pmcr state.
Wed, May 28, 1:36 PM
andrew closed D50432: hwpmc/arm64: The counter is 64-bit.
Wed, May 28, 1:36 PM
andrew committed rG8cad445495a1: arm64: Sort the PMCR_EL0 fields (authored by andrew).
arm64: Sort the PMCR_EL0 fields
Wed, May 28, 1:36 PM
andrew committed rG18db17f5ec86: arm64: Make all the PMCR_EL0 fields 64-bit (authored by andrew).
arm64: Make all the PMCR_EL0 fields 64-bit
Wed, May 28, 1:36 PM
andrew closed D50430: arm64: Add more PMCR_EL0 fields.
Wed, May 28, 1:36 PM
andrew closed D50433: hwpmc/arm64: Support 64-bit counters.
Wed, May 28, 1:36 PM
andrew closed D50428: arm64: Sort the PMCR_EL0 fields.
Wed, May 28, 1:35 PM
andrew committed rGdbb620910f15: hwpmc/arm64: PMCR_EL0 is a 64-bit register (authored by andrew).
hwpmc/arm64: PMCR_EL0 is a 64-bit register
Wed, May 28, 1:35 PM
andrew committed rG8535ee063118: hwpmc/arm64: Make the pmcr variable descriptive (authored by andrew).
hwpmc/arm64: Make the pmcr variable descriptive
Wed, May 28, 1:35 PM
andrew closed D50431: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit.
Wed, May 28, 1:35 PM
andrew closed D50429: arm64: Make all the PMCR_EL0 fields 64-bit.
Wed, May 28, 1:35 PM
andrew closed D50426: hwpmc/arm64: Make the pmcr variable descriptive.
Wed, May 28, 1:35 PM
andrew committed rG77d5df3b9261: arm64: Move CPU feature & errata setup earlier (authored by andrew).
arm64: Move CPU feature & errata setup earlier
Wed, May 28, 1:35 PM
andrew committed rG602c858e000d: arm64: Reuse aps_started to simplify SMP boot (authored by andrew).
arm64: Reuse aps_started to simplify SMP boot
Wed, May 28, 1:35 PM
andrew closed D50427: hwpmc/arm64: PMCR_EL0 is a 64-bit register.
Wed, May 28, 1:35 PM
andrew committed rG40d2b3135204: arm64: Split out the loop to wait for APs (authored by andrew).
arm64: Split out the loop to wait for APs
Wed, May 28, 1:35 PM
andrew closed D50367: amr64: Move CPU feature & errata setup earlier.
Wed, May 28, 1:35 PM
andrew closed D50366: arm64: Reuse aps_started to simplify SMP boot.
Wed, May 28, 1:35 PM
andrew closed D50365: arm64: Split out the loop to wait for APs.
Wed, May 28, 1:35 PM

Tue, May 27

andrew added inline comments to D50370: ufshci: Introduce the ufshci(4) driver.
Tue, May 27, 11:39 AM

Thu, May 22

andrew added inline comments to D50370: ufshci: Introduce the ufshci(4) driver.
Thu, May 22, 3:07 PM

Tue, May 20

andrew requested review of D50434: hwpmc/arm64: Hard code the initial pmcr state.
Tue, May 20, 10:42 AM
andrew requested review of D50433: hwpmc/arm64: Support 64-bit counters.
Tue, May 20, 10:42 AM
andrew requested review of D50432: hwpmc/arm64: The counter is 64-bit.
Tue, May 20, 10:42 AM
andrew requested review of D50430: arm64: Add more PMCR_EL0 fields.
Tue, May 20, 10:42 AM
andrew requested review of D50431: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit.
Tue, May 20, 10:42 AM
andrew requested review of D50429: arm64: Make all the PMCR_EL0 fields 64-bit.
Tue, May 20, 10:41 AM
andrew requested review of D50428: arm64: Sort the PMCR_EL0 fields.
Tue, May 20, 10:41 AM
andrew requested review of D50427: hwpmc/arm64: PMCR_EL0 is a 64-bit register.
Tue, May 20, 10:41 AM
andrew requested review of D50426: hwpmc/arm64: Make the pmcr variable descriptive.
Tue, May 20, 10:41 AM

Thu, May 15

andrew requested review of D50367: amr64: Move CPU feature & errata setup earlier.
Thu, May 15, 5:10 PM
andrew requested review of D50366: arm64: Reuse aps_started to simplify SMP boot.
Thu, May 15, 5:10 PM
andrew requested review of D50365: arm64: Split out the loop to wait for APs.
Thu, May 15, 5:10 PM
andrew committed rGebeeeae67845: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr (authored by andrew).
subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr
Thu, May 15, 3:28 PM
andrew committed rG66886d9d9608: subr_devmap: Add the function name to KASSERT (authored by andrew).
subr_devmap: Add the function name to KASSERT
Thu, May 15, 3:28 PM
andrew closed D50308: subr_devmap: Add the function name to KASSERT.
Thu, May 15, 3:28 PM
andrew closed D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.
Thu, May 15, 3:28 PM
andrew committed rG68baf043e48b: arm: Make the pmap_kenter signature like arm64 (authored by andrew).
arm: Make the pmap_kenter signature like arm64
Thu, May 15, 3:28 PM
andrew closed D50307: arm: Make the pmap_kenter signature like arm64.
Thu, May 15, 3:28 PM

Wed, May 14

andrew updated the diff for D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.

KASSERT ma == VM_MEMATTR_DEVICE

Wed, May 14, 12:57 PM

Tue, May 13

andrew updated the diff for D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.

Only call devmap_ptov for device mappings

Tue, May 13, 10:29 AM

Mon, May 12

andrew updated the diff for D50307: arm: Make the pmap_kenter signature like arm64.

Split out the mapping part of pmap_kenter to:

  • Remove unneeded tlb flush from mem.c
  • Keep the local only flush in pmap_kenter_temporary
Mon, May 12, 4:47 PM
andrew requested review of D50308: subr_devmap: Add the function name to KASSERT.
Mon, May 12, 1:05 PM
andrew requested review of D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.
Mon, May 12, 1:05 PM
andrew requested review of D50307: arm: Make the pmap_kenter signature like arm64.
Mon, May 12, 1:05 PM
andrew committed rG4bc53dc71c57: arm64: Use a sys handler for CTR_EL0 (authored by andrew).
arm64: Use a sys handler for CTR_EL0
Mon, May 12, 12:51 PM
andrew closed D50212: arm64: Remove unneeded fields from mrs_user_reg.
Mon, May 12, 12:51 PM
andrew committed rG00832dc0cecf: arm64: Remove unneeded fields from mrs_user_reg (authored by andrew).
arm64: Remove unneeded fields from mrs_user_reg
Mon, May 12, 12:51 PM
andrew committed rG5bcd16cced3b: arm64: Use the new sys handler for ID regs (authored by andrew).
arm64: Use the new sys handler for ID regs
Mon, May 12, 12:51 PM
andrew committed rGe4619b088dd0: arm64: Add the ESR ISS value to struct mrs_user_reg (authored by andrew).
arm64: Add the ESR ISS value to struct mrs_user_reg
Mon, May 12, 12:51 PM
andrew committed rG0b521e322c32: arm: Switch the timer to the new sys handler (authored by andrew).
arm: Switch the timer to the new sys handler
Mon, May 12, 12:51 PM
andrew committed rG5673ea5ca9ec: arm64: Start splitting out undef sys insn handling (authored by andrew).
arm64: Start splitting out undef sys insn handling
Mon, May 12, 12:51 PM
andrew committed rG71ca0252dc6d: arm64: Split out the 32-bit undef handling (authored by andrew).
arm64: Split out the 32-bit undef handling
Mon, May 12, 12:51 PM
andrew closed D50213: arm64: Use a sys handler for CTR_EL0.
Mon, May 12, 12:51 PM
andrew committed rG4b6308416e3e: arm64: Allow building the MSR ISS from raw values (authored by andrew).
arm64: Allow building the MSR ISS from raw values
Mon, May 12, 12:51 PM
andrew closed D50211: arm64: Use the new sys handler for ID regs.
Mon, May 12, 12:51 PM
andrew closed D50210: arm64: Add the ESR ISS value to struct mrs_user_reg.
Mon, May 12, 12:51 PM
andrew closed D50206: arm64: Allow building the MSR ISS from raw values.
Mon, May 12, 12:51 PM
andrew closed D50209: arm: Switch the timer to the new sys handler.
Mon, May 12, 12:51 PM
andrew committed rGf68ca1421a1d: arm64: Remove kernel undef instruction support (authored by andrew).
arm64: Remove kernel undef instruction support
Mon, May 12, 12:51 PM
andrew closed D50208: arm64: Start splitting out undef sys insn handling.
Mon, May 12, 12:50 PM
andrew closed D50207: arm64: Split out the 32-bit undef handling.
Mon, May 12, 12:50 PM
andrew committed rG8bfb456eafd3: arm64: Raise a SIGILL if we fail reading an insn (authored by andrew).
arm64: Raise a SIGILL if we fail reading an insn
Mon, May 12, 12:50 PM
andrew committed rG10a93c92c40a: arm64: Remove an old workaround (authored by andrew).
arm64: Remove an old workaround
Mon, May 12, 12:50 PM
andrew closed D50205: arm64: Remove kernel undef instruction support.
Mon, May 12, 12:50 PM
andrew closed D50203: arm64: Raise a SIGILL if we fail reading an insn.
Mon, May 12, 12:50 PM
andrew closed D50204: arm64: Remove an old workaround.
Mon, May 12, 12:50 PM

Fri, May 9

andrew updated the summary of D50204: arm64: Remove an old workaround.
Fri, May 9, 2:50 PM
andrew accepted D50116: bhyve: when accessing non-backed gpa, emulate hw.

I'm ok with the arm64 parts

Fri, May 9, 2:29 PM

May 9 2025

andrew committed rG4a38527105d5: pci: Ignore PCRx devices resources (authored by andrew).
pci: Ignore PCRx devices resources
May 9 2025, 11:09 AM
andrew closed D49709: pci: Ignore PCRx devices resources.
May 9 2025, 11:09 AM
andrew added inline comments to D50116: bhyve: when accessing non-backed gpa, emulate hw.
May 9 2025, 10:00 AM

May 8 2025

andrew updated the diff for D49709: pci: Ignore PCRx devices resources.

Update based on feedback from @jhb

May 8 2025, 9:59 AM

May 6 2025

andrew requested review of D50214: arm64: Reduce where we decode msr/mrs instructions.
May 6 2025, 5:05 PM
andrew requested review of D50212: arm64: Remove unneeded fields from mrs_user_reg.
May 6 2025, 5:05 PM
andrew requested review of D50213: arm64: Use a sys handler for CTR_EL0.
May 6 2025, 5:05 PM
andrew requested review of D50211: arm64: Use the new sys handler for ID regs.
May 6 2025, 5:04 PM
andrew requested review of D50210: arm64: Add the ESR ISS value to struct mrs_user_reg.
May 6 2025, 5:04 PM
andrew requested review of D50209: arm: Switch the timer to the new sys handler.
May 6 2025, 5:04 PM
andrew requested review of D50208: arm64: Start splitting out undef sys insn handling.
May 6 2025, 5:04 PM
andrew requested review of D50207: arm64: Split out the 32-bit undef handling.
May 6 2025, 5:04 PM
andrew requested review of D50206: arm64: Allow building the MSR ISS from raw values.
May 6 2025, 5:04 PM