User Details
- User Since
- May 10 2014, 2:21 PM (620 w, 6 d)
Wed, Apr 1
Remove extra lines at the start of MAkefiles
Tue, Mar 31
- Add an mtree entry
- Check the headder type
- Use a brk instruction to stop execution as a syscall may drop the SVE context
Mon, Mar 23
Thu, Mar 19
- Zero the set in pmap_fini_asids
- Add a missing tlbi
This is not complete, but would be useful to get feedback on the approach
Tue, Mar 17
Remove userret from EXCP_MOE. Was missed in a rebase.
Fix the initial value of skip_userret
Mon, Mar 16
Is there a reason to not just read the ID register in the vmm code?
Tue, Mar 10
Mon, Mar 9
Thu, Mar 5
Set a variable to check if we need to skip userret
Wed, Mar 4
I see, the issue is the generated ifunc trampolines only have BTI landing pads when the note is in all object files.
Mar 4 2026
The change is correct. I think it is more likely that rebuilding the kernel with a consistent toolchain is the fix for the BTI exception.
How does it fix the Branch Target exception? The kernel doesn't care about the note, it's just there to ensure all source files are built with BTI enabled.
Mar 3 2026
Mar 2 2026
Should the dma sync operations be BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD and BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE given virtio may read from & write to the buffer.
Feb 27 2026
Where is the thunderbolt device defined? I don't see it in main.
Feb 25 2026
Should the alignment for the rx & tx DMA tags be VTNET_ETHER_ALIGN?
Feb 24 2026
Feb 18 2026
Feb 17 2026
Do we want to zero the CPU for PPIs & IPIs? I expect that check should be before the handlers == 0 check as they may be sent to all CPUs.
