Page MenuHomeFreeBSD

arm64: Add more CPU MIDR values
ClosedPublic

Authored by andrew on Jun 6 2025, 5:21 PM.
Tags
None
Referenced Files
Unknown Object (File)
Tue, Nov 4, 4:44 PM
Unknown Object (File)
Sun, Oct 26, 1:02 PM
Unknown Object (File)
Sun, Oct 26, 6:16 AM
Unknown Object (File)
Fri, Oct 24, 8:29 PM
Unknown Object (File)
Oct 11 2025, 2:49 AM
Unknown Object (File)
Sep 28 2025, 12:25 PM
Unknown Object (File)
Sep 23 2025, 5:31 PM
Unknown Object (File)
Sep 18 2025, 4:31 PM
Subscribers

Details

Summary

Found in Linux and https://github.com/arm-software/data

Sponsored by: Arm Ltd

Diff Detail

Repository
rG FreeBSD src repository
Lint
Lint Not Applicable
Unit
Tests Not Applicable

Event Timeline

andrew requested review of this revision.Jun 6 2025, 5:21 PM
bcran added inline comments.
sys/arm64/arm64/identcpu.c
262

To be consistent, "AmpereOne" should probably be "AmpereOne AC03", and "AmpereOne-1A" should be "AmpereOne AC04".
There will also be an "AmpereOne AC04_1".

For example, see https://amperecomputing.com/tutorials/gcc-guide-ampere-processors.

sys/arm64/arm64/identcpu.c
262

Is AC04_1 the 0xac5 case I see in LLVM?

sys/arm64/arm64/identcpu.c
262

Based on the errata doc I found it looks like the AC04 and AC04_1 have the same midr so will both show up as the former.

Update the AmpereOne names

This revision was not accepted when it landed; it landed in state Needs Review.Jun 23 2025, 1:20 PM
This revision was automatically updated to reflect the committed changes.