Page MenuHomeFreeBSD

arm64: Add more CPU MIDR values
ClosedPublic

Authored by andrew on Jun 6 2025, 5:21 PM.
Tags
None
Referenced Files
Unknown Object (File)
Fri, Apr 3, 1:33 AM
Unknown Object (File)
Wed, Apr 1, 5:57 AM
Unknown Object (File)
Mon, Mar 30, 7:35 PM
Unknown Object (File)
Mon, Mar 23, 6:14 AM
Unknown Object (File)
Wed, Mar 18, 11:30 PM
Unknown Object (File)
Sun, Mar 8, 2:44 AM
Unknown Object (File)
Mar 2 2026, 12:14 AM
Unknown Object (File)
Feb 28 2026, 1:26 PM
Subscribers

Diff Detail

Repository
rG FreeBSD src repository
Lint
Lint Not Applicable
Unit
Tests Not Applicable

Event Timeline

andrew requested review of this revision.Jun 6 2025, 5:21 PM
bcran added inline comments.
sys/arm64/arm64/identcpu.c
262

To be consistent, "AmpereOne" should probably be "AmpereOne AC03", and "AmpereOne-1A" should be "AmpereOne AC04".
There will also be an "AmpereOne AC04_1".

For example, see https://amperecomputing.com/tutorials/gcc-guide-ampere-processors.

sys/arm64/arm64/identcpu.c
262

Is AC04_1 the 0xac5 case I see in LLVM?

sys/arm64/arm64/identcpu.c
262

Based on the errata doc I found it looks like the AC04 and AC04_1 have the same midr so will both show up as the former.

Update the AmpereOne names

This revision was not accepted when it landed; it landed in state Needs Review.Jun 23 2025, 1:20 PM
This revision was automatically updated to reflect the committed changes.