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xen/intr: arm64: implement Xen event balancing
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Authored by ehem_freebsd_m5p.com on Aug 26 2021, 4:29 AM.
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Details

Summary

This distributes the event channels among processors instead of placing
all of them on vCPU#0. Normal interrupt sources are balanced once, at
the end of the boot process. Since new event channels can be created
any time, they need to be dynamically balanced.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Lint Passed
Unit
No Test Coverage
Build Status
Buildable 42835
Build 39723: arc lint + arc unit

Event Timeline

This is a child of D31063, but not a parent of D30950. The reason being D31063 introduces the function modified in D31690. While Xen/ARM64 VMs may have low performance without D31690, they will function, thus it is reasonable to enable Xen/ARM64 without this commit.

Updating given updates elsewhere. This is the set isrc->xi_cpu approach.