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hwpmc: include PMC_CLASS_PERF in the PMC class range
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Authored by ojanerif_amd.com on Fri, Oct 9, 7:04 PM.
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Details

Summary

PMC_CLASS_PERF (0x1a) was added after PMC_CLASS_RAPL, but
PMC_CLASS_LAST was left at PMC_CLASS_RAPL.

Fixes: 5369f8e73eff ("hwpmc: add MPERF/APERF MSR support for AMD/Intel CPUs")
Sponsored by: AMD
Signed-off-by: Osvaldo Janeri Filho <ojanerif@amd.com>

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Event Timeline

Stack adding the AMD IOMMU performance counters as an hwpmc(4) class:
D60546 fixes PMC_CLASS_LAST, D60547 exports the counters from the IOMMU driver,
D60548 adds the class, D60549 adds the tests.

This revision is now accepted and ready to land.Thu, Oct 15, 1:03 AM