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rtwn: refactor out the TX power register power dump, condense output
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Authored by adrian on Dec 8 2024, 3:48 PM.
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Details

Summary
  • Refactor out the TX power register register dump - it's done in a couple places and it makes sense to refactor it.
  • Condense the output into a few lines per transmit chain. It's very long with the 8 and 16 MCS rates, and it made it difficult to eyeball what's going on when tweaking TX power.

Diff Detail

Repository
rG FreeBSD src repository
Lint
Lint Passed
Unit
No Test Coverage
Build Status
Buildable 61031
Build 57915: arc lint + arc unit

Event Timeline

adrian requested review of this revision.Dec 8 2024, 3:48 PM

This looks sane, but I don't know if it's right from a. hardware perspective.

This revision is now accepted and ready to land.Dec 12 2024, 6:16 PM
bz added a subscriber: bz.

Should be fine; debugging only anyway..

This revision now requires review to proceed.Dec 18 2024, 4:47 PM
This revision is now accepted and ready to land.Dec 18 2024, 10:14 PM