rtwn: add a register value for R92C_FPGA0_POWER_SAVE, and other bits

[adrian]

Summary

• add a register value for the R92C_FPGA0_POWER_SAVE register
• add the field names and mask
• add a mask for the 40MHz upper/lower bits in R92C_RMRR; I think I need to debug and overhaul the 20/40MHz config path to get 40MHz working right.

Local testing:

• rtl8188eu, sta mode
• rtl8192cu, sta mode

[bz]

"I think ..." doesn't sound like it needs to be a commit message but a personal note. Maybe update it before committing.