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Wed, Oct 7

rick_sloservers.com added a comment to D60278: riscv: Enable linker relaxation with lld 15 and later.

Looking at this again, I think your instinct is right and the block in defs.mk can just go. It came in with the riscv EFI loader (2192efc03bc4), but 79f5991559ce had already moved -mno-relax into bsd.prog.mk and bsd.lib.mk a few months before, so the loader gets the flag from there. I removed it and checked every riscv dir under stand, they all still get -mrelax. I think an .else would also have to go under a riscv check, or else the amd64 and arm64 loaders would get -mrelax. Removing the whole block seems cleaner. What do you think?

Wed, Oct 7, 9:19 PM · riscv
mhorne added inline comments to D60278: riscv: Enable linker relaxation with lld 15 and later.
Wed, Oct 7, 4:16 PM · riscv

Sun, Oct 4

rick_sloservers.com added inline comments to D60278: riscv: Enable linker relaxation with lld 15 and later.
Sun, Oct 4, 2:53 PM · riscv
mhorne added inline comments to D60278: riscv: Enable linker relaxation with lld 15 and later.
Sun, Oct 4, 2:28 PM · riscv

Sat, Oct 3

rick_sloservers.com retitled D60278: riscv: Enable linker relaxation with lld 15 and later from riscv: Use linker relaxation with lld 15 and later to riscv: Enable linker relaxation with lld 15 and later.
Sat, Oct 3, 1:42 PM · riscv
rick_sloservers.com added a comment to D60278: riscv: Enable linker relaxation with lld 15 and later.

Yes, no problem. Sorry, it's not lack of effort on my part, just ignorance. I'm new to this system and didn't know that the summary becomes the commit message, I can understand now why that would be irritating. Give a few moments, please, and I will rewrite.

Sat, Oct 3, 1:31 PM · riscv
jrtc27 added a comment to D60278: riscv: Enable linker relaxation with lld 15 and later.

If you’re to use them, at least have the decency to remove all the slop and write a proper commit message. As it stands this is a very low-effort change that feels extractive.

Sat, Oct 3, 1:09 PM · riscv
rick_sloservers.com added a comment to D60278: riscv: Enable linker relaxation with lld 15 and later.

Did you use LLMs to generate this?

Sat, Oct 3, 1:03 PM · riscv
jrtc27 added a comment to D60278: riscv: Enable linker relaxation with lld 15 and later.

Did you use LLMs to generate this?

Sat, Oct 3, 1:00 PM · riscv
rick_sloservers.com requested review of D60278: riscv: Enable linker relaxation with lld 15 and later.
Sat, Oct 3, 12:56 PM · riscv

Tue, Sep 22

mhorne closed D59478: CPU temperature sensor for jh7110.
Tue, Sep 22, 1:53 PM · riscv
bnovkov accepted D59478: CPU temperature sensor for jh7110.
Tue, Sep 22, 1:20 PM · riscv
mhorne accepted D59478: CPU temperature sensor for jh7110.
Tue, Sep 22, 1:19 PM · riscv
bscott_bunyatech.com.au added a comment to D59478: CPU temperature sensor for jh7110.

All cool by me.

Tue, Sep 22, 5:42 AM · riscv

Mon, Sep 21

mhorne closed D59479: Reduce eqos if driver noisiness.
Mon, Sep 21, 10:47 PM · riscv
mhorne added a comment to D59478: CPU temperature sensor for jh7110.

I am ready to commit this and have applied my suggested changes locally. Please confirm that you are happy with the copyright header text, and I will proceed.

Mon, Sep 21, 10:20 PM · riscv

Sep 14 2026

bscott_bunyatech.com.au updated the diff for D59478: CPU temperature sensor for jh7110.

Made changes as suggested.

Sep 14 2026, 5:22 AM · riscv
bscott_bunyatech.com.au added a comment to D59478: CPU temperature sensor for jh7110.

New diff in a few minutes.

Sep 14 2026, 5:16 AM · riscv

Sep 9 2026

mhorne accepted D59479: Reduce eqos if driver noisiness.

Note, the eqos(4) driver has an uncertain future. It is possible that we will move to supporting this hardware with the dwc(4) driver instead; see https://reviews.freebsd.org/D59191 if interested.

Sep 9 2026, 1:56 PM · riscv
bnovkov added inline comments to D59478: CPU temperature sensor for jh7110.
Sep 9 2026, 1:43 PM · riscv
mhorne added a comment to D59478: CPU temperature sensor for jh7110.

Generally LGTM, with some minor tweaks needed.

Sep 9 2026, 1:20 PM · riscv
bnovkov added a member for riscv: bnovkov.
Sep 9 2026, 8:16 AM

Sep 7 2026

bscott_bunyatech.com.au requested review of D59479: Reduce eqos if driver noisiness.
Sep 7 2026, 11:48 AM · riscv
bscott_bunyatech.com.au requested review of D59478: CPU temperature sensor for jh7110.
Sep 7 2026, 11:35 AM · riscv

Aug 21 2026

mhorne closed D58693: riscv jh7110 gpio driver enhancements.
Aug 21 2026, 4:55 PM · riscv
mhorne added inline comments to D58693: riscv jh7110 gpio driver enhancements.
Aug 21 2026, 4:36 PM · riscv
mhorne accepted D58693: riscv jh7110 gpio driver enhancements.

LGTM! Thanks for your work. I will make the necessary style tweaks before committing (I noted a couple).

Aug 21 2026, 4:35 PM · riscv

Aug 20 2026

bscott_bunyatech.com.au updated the diff for D58693: riscv jh7110 gpio driver enhancements.

Updated for very confusing way of describing the pin drive strength field that had resulted in an off by one error that cleared the pull-up control.

Aug 20 2026, 1:20 PM · riscv
bscott_bunyatech.com.au added a comment to D58693: riscv jh7110 gpio driver enhancements.

I think I may have had some brain fade about shifting with a shifted number.

Aug 20 2026, 12:43 PM · riscv

Aug 19 2026

bscott_bunyatech.com.au updated the diff for D58693: riscv jh7110 gpio driver enhancements.

As described in my previous comments. Now tested and shown to be working.

Aug 19 2026, 11:56 PM · riscv

Aug 12 2026

bscott_bunyatech.com.au added a comment to D58693: riscv jh7110 gpio driver enhancements.

Thanks for looking at this. It will be next week before I can test any changes and put up a new, tested diff. I'm away from home at the moment and don't trust doing a restart remotely. I've managed to get the restart working more often that not (it simply doesn't work by default) but haven't got anything working well enough to publish or trust

Aug 12 2026, 12:06 AM · riscv

Aug 11 2026

mhorne added a comment to D58693: riscv jh7110 gpio driver enhancements.

Hi, thanks for this submission.

Aug 11 2026, 4:14 PM · riscv

Aug 6 2026

bscott_bunyatech.com.au requested review of D58693: riscv jh7110 gpio driver enhancements.
Aug 6 2026, 1:14 PM · riscv

May 12 2026

zishun.yi.dev_gmail.com added a member for riscv: zishun.yi.dev_gmail.com.
May 12 2026, 8:35 AM

Apr 20 2026

mhorne added inline comments to D53804: riscv cpu_fork(), saving fpe state.
Apr 20 2026, 8:51 PM · riscv

Mar 17 2026

jsihv_gmx.com added inline comments to D53804: riscv cpu_fork(), saving fpe state.
Mar 17 2026, 4:34 PM · riscv

Mar 12 2026

jsihv_gmx.com added inline comments to D53804: riscv cpu_fork(), saving fpe state.
Mar 12 2026, 4:56 PM · riscv

Mar 11 2026

mhorne added a comment to D53804: riscv cpu_fork(), saving fpe state.

I am sorry to speak up only now, after the review sat open for so long. But in looking over the change it seems to be incomplete.

Mar 11 2026, 4:35 PM · riscv

Mar 5 2026

br closed D53804: riscv cpu_fork(), saving fpe state.
Mar 5 2026, 9:02 AM · riscv

Feb 27 2026

br accepted D53804: riscv cpu_fork(), saving fpe state.
Feb 27 2026, 9:41 AM · riscv
jsihv_gmx.com updated the diff for D53804: riscv cpu_fork(), saving fpe state.

I added MPASS macro following the example of AMD64's code in a corresponding place. I verified that the execution always visits ecall_handler() before it arrives here.

Feb 27 2026, 8:59 AM · riscv

Feb 25 2026

br added a comment to D53804: riscv cpu_fork(), saving fpe state.

if td1 is always curthread, then a kassert is needed

Feb 25 2026, 8:32 AM · riscv

Feb 9 2026

mchoo added a member for riscv: mchoo.
Feb 9 2026, 5:54 AM

Jan 30 2026

br added a comment to D43452: riscv: Introduce support for Incoming MSI Controller (IMSIC).

how hard it would be to implement MSI interface here? to support MSI interrupts from devices, which is a crucial functionality

Jan 30 2026, 4:38 PM · riscv

Nov 18 2025

jsihv_gmx.com requested review of D53804: riscv cpu_fork(), saving fpe state.
Nov 18 2025, 3:18 PM · riscv

Oct 23 2025

mengzhuo1203_gmail.com updated the diff for D53232: riscv: explicit memory barrier primitives.
Oct 23 2025, 4:49 AM · riscv
mengzhuo1203_gmail.com added a comment to D53232: riscv: explicit memory barrier primitives.

This will not fix that bug. fence is fence iorw, iorw, so all you are doing is relaxing some ordering requirements.

Oct 23 2025, 1:51 AM · riscv
mengzhuo1203_gmail.com updated the diff for D53232: riscv: explicit memory barrier primitives.
Oct 23 2025, 1:50 AM · riscv

Oct 22 2025

jrtc27 added a comment to D53232: riscv: explicit memory barrier primitives.

This will not fix that bug. fence is fence iorw, iorw, so all you are doing is relaxing some ordering requirements.

Oct 22 2025, 9:47 AM · riscv
mengzhuo1203_gmail.com updated the diff for D53232: riscv: explicit memory barrier primitives.

@jrtc27 I've update the revision, PTAL

Oct 22 2025, 4:58 AM · riscv