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nick (Nicholas O'Brien)
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User Since
Sep 9 2019, 5:17 PM (63 w, 2 d)

Recent Activity

Fri, Nov 6

nick added a member for security: nick.
Fri, Nov 6, 10:49 PM
nick added a member for Linux Emulation: nick.
Fri, Nov 6, 10:45 PM

Oct 13 2020

nick abandoned D23878: RISCV: SiFive specific platform.
Oct 13 2020, 5:37 AM · riscv
nick closed D23877: RISCV Platform Specific Code.
Oct 13 2020, 5:37 AM · riscv
nick closed D23879: RISCV: PLATFORM_DEFAULT implementation.
Oct 13 2020, 5:36 AM · riscv

Oct 5 2020

nick added a comment to D26649: Drop a useless assignment, and add a KASSERT to make sure it really was useless..

Looks good to me.

Oct 5 2020, 4:13 AM

Oct 2 2020

nick committed rS366366: flash: Add support for SPI flash s25fl512s.
flash: Add support for SPI flash s25fl512s
Oct 2 2020, 5:34 PM

Sep 23 2020

nick committed rS366086: riscv: Trap cleanup - use nitems().
riscv: Trap cleanup - use nitems()
Sep 23 2020, 6:54 PM

Aug 18 2020

nick committed rS364349: riscv: Use global mimpid in identify_cpu().
riscv: Use global mimpid in identify_cpu()
Aug 18 2020, 4:51 PM
nick closed D26092: riscv: Use global mimpid in identify_cpu().
Aug 18 2020, 4:51 PM · riscv

Aug 17 2020

nick requested review of D26092: riscv: Use global mimpid in identify_cpu().
Aug 17 2020, 9:20 PM · riscv

Jun 6 2020

nick added a comment to D25151: RISC-V: handle DTB aligned to less than 2MB.

Can confirm it works with and without the bootloader adjustments.

Jun 6 2020, 1:27 AM

Apr 15 2020

nick added a comment to D24154: RISC-V: use physmem to manage physical memory.

These changes look good. I can confirm that this works.

Apr 15 2020, 10:28 PM
nick added a comment to D24155: RISC-V: exclude reserved memory regions.

I think we can name reserved regions, looking for a reserved-memory child node for the bootloader may be a good idea. If someone already has reserved-memory but it's for a non-bootloader purpose I think this will break.

Apr 15 2020, 10:08 PM
nick added a comment to D24153: Convert arm's physmem interface to MI code.

I can confirm this boots on our RISC-V platform.

Apr 15 2020, 8:55 PM

Apr 2 2020

nick committed rS359555: riscv/sifive: add FE310 Always-on driver.
riscv/sifive: add FE310 Always-on driver
Apr 2 2020, 12:33 AM
nick closed D24170: SiFive FE310 Always-on driver.
Apr 2 2020, 12:33 AM · riscv

Mar 30 2020

nick updated the diff for D24170: SiFive FE310 Always-on driver.

Use exit.

Mar 30 2020, 6:29 PM · riscv

Mar 24 2020

nick added a comment to D24152: RISC-V: copy the DTB to early KVA.

I haven't tested this, yet, either. It looks good though.

Mar 24 2020, 4:02 PM
nick created D24170: SiFive FE310 Always-on driver.
Mar 24 2020, 12:45 AM · riscv

Mar 23 2020

nick accepted rS359218: Fix ordering of machine includes.

Looks good to me. Thanks for the cleanup!

Mar 23 2020, 12:00 AM

Mar 22 2020

nick accepted D24155: RISC-V: exclude reserved memory regions.
Mar 22 2020, 11:42 PM
nick added a comment to D24155: RISC-V: exclude reserved memory regions.

Looks good to me. Thanks for this patch Mitchell!

Mar 22 2020, 11:41 PM

Mar 20 2020

nick committed rD54001: Add myself (nick) as a src committer.
Add myself (nick) as a src committer
Mar 20 2020, 5:54 PM
nick closed D24129: Add myself (nick) as a src commiter.
Mar 20 2020, 5:54 PM
nick committed rS359179: Add myself (nick) as a src committer.
Add myself (nick) as a src committer
Mar 20 2020, 5:16 PM
nick closed D24130: Add myself (nick) as a src commiter.
Mar 20 2020, 5:16 PM
nick updated the summary of D24129: Add myself (nick) as a src commiter.
Mar 20 2020, 2:49 AM
nick updated the summary of D24130: Add myself (nick) as a src commiter.
Mar 20 2020, 2:48 AM
nick created D24130: Add myself (nick) as a src commiter.
Mar 20 2020, 12:14 AM
nick created D24129: Add myself (nick) as a src commiter.
Mar 20 2020, 12:05 AM

Mar 12 2020

pi renamed nick from nickisobrien_gmail.com to nick.
Mar 12 2020, 5:06 AM

Mar 9 2020

nick added a comment to D23877: RISCV Platform Specific Code.

Hi Ruslan,

Why cpu_check_mmu() does not work for you?

There's nothing harmful in this check long term, but from what I can tell, the reason we do that check is specific to the FU540 which, in principal, in my opinion, shouldn't be in the base kernel.

Mar 9 2020, 5:58 PM · riscv
nick created D24004: SiFive/SPI: Silence build warning.
Mar 9 2020, 3:35 AM

Mar 5 2020

nick updated the diff for D23877: RISCV Platform Specific Code.
  • Silence warning if PLATFORM isn't set
  • Remove unnecessary headers in mp_machdep.c
Mar 5 2020, 11:26 PM · riscv
nick added a comment to D23877: RISCV Platform Specific Code.

Thanks for taking the time to think about it @mhorne and @philip! It's important to have these discussions. More flexibility doesn't necessarily equal "better".

One thing I think is unclear is how OpenSBI will fare when we start to see more platforms emerge. They provide a space for vendor-specific SBI extensions, and make it "easy" to port to new platforms, but we will have to see if vendors actually go for that. I think some of our kernel architecture for RISC-V will be driven by how well the SBI is adopted.

Yeah, I'm also really curious about how SBI is going to be implemented by vendors and it will undoubtedly drive our kernel development in regards to platform specificity moving forward. I'd probably prefer to see most of those "hacks" taken care of in SBI but it's not quite clear whether that's the case today.

agree with you in the general case, we don't want platform specific hacks scattered around the kernel, it's better to keep them in one location. I believe that "mmu-type" is intended to be a standard property in all RISC-V device trees going forward, and we could reliably check it for all platforms. See: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/riscv/cpus.yaml

Yeah, there's nothing necessarily harmful in this check from what I can tell. And as I said, at Axiado it's not harming us, but as Philip pointed out:

Currently the default RISC-V platform smells a lot like FU540.

It's more the principal that concerns me here rather than the direct impact of this specific check. I understand that you agree with this as well.

Mar 5 2020, 9:45 PM · riscv

Mar 2 2020

nick added a comment to D23877: RISCV Platform Specific Code.

Okay, I'm not totally opposed to this interface, but I would like to better understand the motivation behind adopting it before we do so.
Does this solve a problem for some proprietary core? As I see it, this doesn't change anything for the FU540.

The arm directory is littered with these platform files, and this seems to be out of necessity due to the variety and inconsistency of standards that exists in its hardware. arm64 seems to have avoided the need for this interface so far, and I wonder if we can do the same. The Linux RISC-V world seems to be pushing hard for OpenSBI and keeping platform abstractions at the firmware level. We don't have to follow what Linux does, but I think we ought to be thoughtful in what we choose to do here. Thoughts?

Mar 2 2020, 10:28 PM · riscv
nick added a reviewer for D23877: RISCV Platform Specific Code: kp.
Mar 2 2020, 7:20 PM · riscv

Feb 29 2020

nick updated the diff for D23879: RISCV: PLATFORM_DEFAULT implementation.
Feb 29 2020, 9:05 PM · riscv
nick updated the diff for D23877: RISCV Platform Specific Code.
Feb 29 2020, 8:45 PM · riscv

Feb 28 2020

nick updated the summary of D23878: RISCV: SiFive specific platform.
Feb 28 2020, 5:42 PM · riscv
nick updated the summary of D23879: RISCV: PLATFORM_DEFAULT implementation.
Feb 28 2020, 5:42 PM · riscv
nick created D23879: RISCV: PLATFORM_DEFAULT implementation.
Feb 28 2020, 5:41 PM · riscv
nick created D23878: RISCV: SiFive specific platform.
Feb 28 2020, 5:37 PM · riscv
nick updated the summary of D23877: RISCV Platform Specific Code.
Feb 28 2020, 5:28 PM · riscv
nick created D23877: RISCV Platform Specific Code.
Feb 28 2020, 5:27 PM · riscv

Oct 15 2019

nick created D22035: Generalize ARM specific comments in devmap.
Oct 15 2019, 12:43 AM

Oct 12 2019

nick added a comment to D21998: RISC-V: Call devmap_print_table() on bootverbose.

While you're at it, it would be helpful to fix the dated arm-specific comments in subr_devmap.c. ;-)

Oct 12 2019, 5:52 PM
nick updated the summary of D21998: RISC-V: Call devmap_print_table() on bootverbose.
Oct 12 2019, 5:50 PM
nick created D21998: RISC-V: Call devmap_print_table() on bootverbose.
Oct 12 2019, 5:36 PM

Oct 10 2019

nick updated the diff for D21975: RISC-V: Call devmap_bootstrap().

Fix the header order (alphabetical)

Oct 10 2019, 9:21 PM
nick updated the diff for D21975: RISC-V: Call devmap_bootstrap().
Oct 10 2019, 9:19 PM
nick created D21975: RISC-V: Call devmap_bootstrap().
Oct 10 2019, 8:34 PM

Sep 9 2019

nick created D21576: Small fix to CPU Compatibility Identification.
Sep 9 2019, 6:24 PM