arm64: mte: handle synchronous tag check faults

[andrew]

Summary

The Memory Tagging Extension supports both Synchronous and Asynchronous
faults, called Tag Check Faults, which are configurable via
SCTLR_EL1.TCF0 for userspace and SCTLR_EL1.TCF for the kernel.

This commit adds support for handling synchronous tag check faults at
EL0 and EL1, although these are only enabled on a per-process basis in
userspace, kernel space does not enable tag check faults. A TCF in the
kernel will cause a kernel panic like any other virtual memory fault,
and a TCF in userspace will result in a SIGSEGV

Sponsored by: Arm Ltd
Signed-off-by: Harry Moulton <[e-mail]>

[andrew]

sys/sys/signal.h

309–310

These should probably be 100 & 101 or similar

[andrew]

sys/sys/signal.h

309–310

@kib Do you have a preference for what values these should be? They will be architecture dependant like SEGV_PKUERR below.

[kib]

sys/sys/signal.h

309–310

Yes, I selected some high value for amd PKRU to allow space for MI code additions. So 100 and later are fine as arch-specific values.

Please add a prefix into the comment, like /* arm64: synchronous MTE ... */

[andrew]

Change the SEGV_MTE* values

[emaste]

It seems I had these in my WIP tree as 8 and 9 with a comment LLDB is adding support for sync MTE exception and async MTE reporting.

Snippet from LLDB code:

// SIGSEGV
ADD_SIGCODE(SIGSEGV, 11, SEGV_MAPERR, 1,   "address not mapped to object",
                SignalCodePrintOption::Address);
ADD_SIGCODE(SIGSEGV, 11, SEGV_ACCERR, 2,   "invalid permissions for mapped object",
                SignalCodePrintOption::Address);
ADD_SIGCODE(SIGSEGV, 11, SEGV_PKUERR, 100, "PKU violation",
                SignalCodePrintOption::Address);

So this will be awkward, short term might be x86 PKU violation or arm64 MTE error

[emaste]

See https://github.com/llvm/llvm-project/blob/main/lldb/source/Plugins/Process/Utility/FreeBSDSignals.cpp

[kib]

In D55947#1294047, @emaste wrote:

It seems I had these in my WIP tree as 8 and 9 with a comment LLDB is adding support for sync MTE exception and async MTE reporting.

Snippet from LLDB code:

// SIGSEGV
ADD_SIGCODE(SIGSEGV, 11, SEGV_MAPERR, 1,   "address not mapped to object",
                SignalCodePrintOption::Address);
ADD_SIGCODE(SIGSEGV, 11, SEGV_ACCERR, 2,   "invalid permissions for mapped object",
                SignalCodePrintOption::Address);
ADD_SIGCODE(SIGSEGV, 11, SEGV_PKUERR, 100, "PKU violation",
                SignalCodePrintOption::Address);

So this will be awkward, short term might be x86 PKU violation or arm64 MTE error

It needs to take the target arch into account.

[emaste]

It needs to take the target arch into account.

Yes it does, but the infrastructure for that is not yet present.

[andrew]

I can move them to something like 200/201. I think the Arm Permission Overlay Extension (FEAT_S1POE) could then reuse SEGV_PKUERR as it is similar.