Addressed comments from jhb's review:

• fixed comment stye & reworded as suggested.
• removed 'id' field until it is needed (in a later patch)

Thanks for the review - will post new version dropping a few includes.

Thanks for the review, will update the diff with the changes (and a fix related use of max).

Thanks for the review, will update the diff.

Need to take another look at this after handling IORT table parsing.

I have submitted another patch for doing NUMA for CPUs similar to x86. This can be dropped.

Fixed issues noted by andrew.

Had to redo link interrupts - dropping this rev. Will post a commit to fixup link interrupts and a new version of this change to use the new interrupt routing.

Keep on hold until we do ACPI NUMA.

I will keep this on hold until we do ACPI based NUMA correctly. x86/acpica/srat.c seems to do most of the things we require, along with memory proximity and SLIT parsing - that would be a better starting point.

The legacy interrupt routing part is not correct. I will redo this - that needs some changes in acpica code as well.

In D17655#377243, @andrew wrote:

Is there an easy way to tell which revision silicon we have? I'd like to check the TX2 I have access to.

I had a different solution of a similar issue for Netlogic XLP. Instead of handling it in UART, I had subclassed the simplebus with a updated implementation of bus_alloc_resource(https://svnweb.freebsd.org/base/head/sys/mips/nlm/xlp_simplebus.c). I provided a different bustag for UART (and other devices) that needed 4-byte access that implementation. The bus implementation took care of reading 4 bytes and extracting and returning the significant byte.

Committed revision 310206.

Seems like a low risk change, no objections seen so far.

committed in revision 310204

Committed as r310190.

checked in r309892

checked in r309890

Updated for the change to gic headers