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gitv3_its: fixes for multiple GIC ITS blocks

Authored by jchandra on Nov 5 2018, 8:08 AM.



First pass of support for multiple GIC ITS blocks with ACPI.
Changes are to:

  • register the correct subset of interrupts with pic_register in case of ACPI
  • initialize the cpu interface for the first ITS, when domain information is not available. This has to be done until we have logic to do LPI init just once per CPU even when there are multiple ITS blocks.
  • remove duplicate check for the GIC ITS domain, the sc_cpus are setup from domain, so the check again in per-CPU init seems unnecessary.
Test Plan

With these changes (and previous ACPI PCI changes), boot successfully on Cavium ThunderX2 Sabre boards.

Diff Detail

rS FreeBSD src repository - subversion
Lint Not Applicable
Tests Not Applicable