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gitv3_its: fixes for multiple GIC ITS blocks
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Authored by jchandra on Nov 5 2018, 8:08 AM.

Details

Summary

First pass of support for multiple GIC ITS blocks with ACPI.
Changes are to:

  • register the correct subset of interrupts with pic_register in case of ACPI
  • initialize the cpu interface for the first ITS, when domain information is not available. This has to be done until we have logic to do LPI init just once per CPU even when there are multiple ITS blocks.
  • remove duplicate check for the GIC ITS domain, the sc_cpus are setup from domain, so the check again in per-CPU init seems unnecessary.
Test Plan

With these changes (and previous ACPI PCI changes), boot successfully on Cavium ThunderX2 Sabre boards.

Diff Detail

Repository
rS FreeBSD src repository
Lint
Automatic diff as part of commit; lint not applicable.
Unit
Automatic diff as part of commit; unit tests not applicable.

Event Timeline

jchandra created this revision.Nov 5 2018, 8:08 AM
andrew accepted this revision.Nov 5 2018, 11:47 AM
This revision is now accepted and ready to land.Nov 5 2018, 11:47 AM
This revision was automatically updated to reflect the committed changes.