handle return code of OF_getencprop() correctly

Remove 0

Address @jrtc27 comments.

Fix error mask settings when CRC is disabled

the hack around MMC return code is now resolved by @pkelsey

In D49248#1132893, @pkelsey wrote:

It does detect the card with your patch, but size is 0bytes (CSD is zero)

mmc0: New card detected (CID 035344534236344780da29024a014400)
mmc0: New card detected (CSD 00000200000000000000000000000000)

I am looking if I can find an issue...

I checked all of the response type mappings against the spec again and found a mistake where I had indexed into the wrong table for the SEND_CSD and SEND_CID translations when making this patch. Attached is a new version that corrects those mappings (as well as corrects another mapping for an SPI-only command, although that change has no functional effect). I expect this will sort out the issue you are observing.

mmcspi.c55 KBDownload

In D49248#1132271, @pkelsey wrote:

@pkelsey Could you add permission to the file uploaded, so I can download.

@br I wasn't aware of that - I think it's resolved now.

In D49248#1132215, @pkelsey wrote:

mmcspi.c55 KBDownload

I've uploaded a version of this file that removes the R7 translation hack and fixes the underlying issue as I've proposed. I did not compile this code, so please excuse any mechanical issues that you find. The SPI response type to SD/MMC response type correspondence that has been added here corresponds to what the code implemented prior to the commit I referenced above, and I double checked it for each command against the current version of the SD Physical Layer Simplified Specification.

Fix comments per @pkelsey request

Address @markj comments. Thanks, Mark!

Address @jrtc27 comments

Add spinlock around DOMAINCFG acccess.

Add clock-frequency property to UART instead of defining fixed-clock

style: end of function return SUCCESS unless switch statement hit FAILURE

Resubmit updated patch

• Remove $FreeBSD$ tags
• Remove unused include headers
• Check if HWT hooks are installed before constructing data structures

Address @jrtc27 and @markj comments (Thanks!)

Address @markj comments

Switch coresight to EL2 otherwise it does not trace CPU mode.

In D40466#1056428, @andrew wrote:

How do you handle different conflicting modes? e.g. a user is tracing a pid & another tries to enable thread tracing. The hardware may not be able to perform both operations.

Prevent tracing the same proc by multiple users.

In D40477#957268, @andrew wrote:

This doesn't build when I add hwt and coresight to my kernel config

Due to pipeline design Coresight components could not be used for more than 1 concurrent tracing sessions.
Atomic counter of sessions added and limited to 1.

Use delayed children attach.
It seems the PHY needs extra 500ms to initialize before we probe for devices. Otherwise PCIB could not find a device (Intel NVME in my case).
So instead of waiting for 500ms, postpone the bus enumeration.

In D48133#1097519, @jrtc27 wrote:

Wait so you put up a patch to disable Sstc before an alternative was provided?