Page MenuHomeFreeBSD

br (Ruslan Bukin)
User

Projects

User Details

User Since
Nov 27 2014, 10:57 AM (540 w, 2 d)

Recent Activity

Today

br added a comment to D49248: mmc: SPI mode support.

@pkelsey Could you add permission to the file uploaded, so I can download.

@br I wasn't aware of that - I think it's resolved now.

Sat, Apr 5, 11:32 AM

Yesterday

br added a comment to D49248: mmc: SPI mode support.

I've uploaded a version of this file that removes the R7 translation hack and fixes the underlying issue as I've proposed. I did not compile this code, so please excuse any mechanical issues that you find. The SPI response type to SD/MMC response type correspondence that has been added here corresponds to what the code implemented prior to the commit I referenced above, and I double checked it for each command against the current version of the SD Physical Layer Simplified Specification.

Fri, Apr 4, 10:02 AM

Thu, Apr 3

br added inline comments to D49248: mmc: SPI mode support.
Thu, Apr 3, 10:15 AM
br updated the diff for D49248: mmc: SPI mode support.

Fix comments per @pkelsey request

Thu, Apr 3, 10:11 AM

Wed, Mar 26

br committed rG3969b51ffa1c: xilinx axi ethernet: allocate memory for buffers. (authored by br).
xilinx axi ethernet: allocate memory for buffers.
Wed, Mar 26, 3:15 PM
br committed rGc7ffe32b1b7d: xilinx quad spi: various fixes. (authored by br).
xilinx quad spi: various fixes.
Wed, Mar 26, 12:11 PM
br committed rG6d58c670060a: riscv timer: fix interrupt handling. (authored by br).
riscv timer: fix interrupt handling.
Wed, Mar 26, 8:26 AM
br closed D49487: riscv timer: fix interrupt handing.
Wed, Mar 26, 8:26 AM

Mon, Mar 24

br requested review of D49487: riscv timer: fix interrupt handing.
Mon, Mar 24, 2:58 PM

Fri, Mar 14

br added reviewers for D49249: mmc: support for SPI bus type: pkelsey, arm64.
Fri, Mar 14, 11:41 AM
br added reviewers for D49248: mmc: SPI mode support: pkelsey, arm64.
Fri, Mar 14, 11:41 AM
br accepted D49336: sgx: Add a simple cdev_pg_path method.
Fri, Mar 14, 11:40 AM

Mar 5 2025

br requested review of D49249: mmc: support for SPI bus type.
Mar 5 2025, 4:53 PM
br requested review of D49248: mmc: SPI mode support.
Mar 5 2025, 4:46 PM

Feb 5 2025

br committed rG48f91cacc39c: bhyve/riscv: clean up SBI handlers. (authored by br).
bhyve/riscv: clean up SBI handlers.
Feb 5 2025, 9:35 AM
br committed rG6492ef7b832c: bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits (authored by br).
bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits
Feb 5 2025, 9:35 AM
br committed rGae65d59d4b8c: riscv vmm: various fixes in APLIC. (authored by br).
riscv vmm: various fixes in APLIC.
Feb 5 2025, 9:35 AM
br closed D48811: bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits.
Feb 5 2025, 9:35 AM
br closed D48829: bhyve/riscv: clean up SBI handlers.
Feb 5 2025, 9:35 AM
br committed rG4eee13813967: riscv vmm: clean up SBI code (authored by br).
riscv vmm: clean up SBI code
Feb 5 2025, 9:35 AM
br committed rGd69ab49ce081: bhyve/riscv: fix HSM extension handling. (authored by br).
bhyve/riscv: fix HSM extension handling.
Feb 5 2025, 9:35 AM
br closed D48807: bhyve/riscv: fix HSM.
Feb 5 2025, 9:35 AM
br closed D48808: riscv vmm: various fixes in APLIC.
Feb 5 2025, 9:35 AM
br closed D48575: riscv vmm: clean up SBI return code.
Feb 5 2025, 9:35 AM

Feb 4 2025

br requested review of D48829: bhyve/riscv: clean up SBI handlers.
Feb 4 2025, 12:08 PM

Feb 3 2025

br updated the diff for D48808: riscv vmm: various fixes in APLIC.

Address @markj comments. Thanks, Mark!

Feb 3 2025, 8:44 PM
br updated the diff for D48575: riscv vmm: clean up SBI return code.

Address @jrtc27 comments

Feb 3 2025, 8:36 PM
br added inline comments to D48808: riscv vmm: various fixes in APLIC.
Feb 3 2025, 4:28 PM
br updated the diff for D48808: riscv vmm: various fixes in APLIC.

Add spinlock around DOMAINCFG acccess.

Feb 3 2025, 4:28 PM
br requested review of D48811: bhyve: Sleep for a short period after VM_EXITCODE_DEBUG exits.
Feb 3 2025, 1:52 PM
br requested review of D48808: riscv vmm: various fixes in APLIC.
Feb 3 2025, 12:14 PM
br requested review of D48807: bhyve/riscv: fix HSM.
Feb 3 2025, 12:07 PM
br committed rGc7e0b94b7de7: riscv vmm: consider hart_mask_base argument in the SBI IPI handler. (authored by br).
riscv vmm: consider hart_mask_base argument in the SBI IPI handler.
Feb 3 2025, 11:53 AM
br committed rG1fdb01ec5fdd: riscv vmm: fix remote fence. (authored by br).
riscv vmm: fix remote fence.
Feb 3 2025, 11:53 AM
br committed rG7ac65902d8ba: bhyve/riscv: fix interrupts-extended property. (authored by br).
bhyve/riscv: fix interrupts-extended property.
Feb 3 2025, 11:53 AM
br closed D48717: riscv vmm: consider hart_mask_base in the SBI IPI handler.
Feb 3 2025, 11:53 AM
br committed rG6b599b34dfb3: bhyve/riscv: remove clock-frequency from CPU node. (authored by br).
bhyve/riscv: remove clock-frequency from CPU node.
Feb 3 2025, 11:53 AM
br closed D48713: riscv bhyve: fix interrupts-extended.
Feb 3 2025, 11:53 AM
br closed D48712: riscv bhyve: remove clock-frequency.
Feb 3 2025, 11:53 AM
br closed D48716: riscv vmm: fix remote fence.
Feb 3 2025, 11:53 AM
br closed D48699: riscv bhyve: add peripheral clock.
Feb 3 2025, 11:53 AM
br committed rG95b8b67f3c4b: bhyve/riscv: add clock-frequency property to DTS. (authored by br).
bhyve/riscv: add clock-frequency property to DTS.
Feb 3 2025, 11:53 AM

Jan 30 2025

br accepted D48531: riscv: Add driver for the cvitek reset controller.
Jan 30 2025, 8:35 AM
br accepted D48532: riscv: Add driver for the cvitek restart controller.
Jan 30 2025, 8:34 AM
br accepted D48533: riscv: Add cvitek SoC files to the build.
Jan 30 2025, 8:28 AM

Jan 29 2025

br updated the summary of D48717: riscv vmm: consider hart_mask_base in the SBI IPI handler.
Jan 29 2025, 4:38 PM
br requested review of D48717: riscv vmm: consider hart_mask_base in the SBI IPI handler.
Jan 29 2025, 4:37 PM
br requested review of D48716: riscv vmm: fix remote fence.
Jan 29 2025, 4:21 PM
br requested review of D48713: riscv bhyve: fix interrupts-extended.
Jan 29 2025, 1:42 PM
br requested review of D48712: riscv bhyve: remove clock-frequency.
Jan 29 2025, 1:11 PM

Jan 27 2025

br updated the diff for D48699: riscv bhyve: add peripheral clock.

Add clock-frequency property to UART instead of defining fixed-clock

Jan 27 2025, 9:31 PM
br requested review of D48699: riscv bhyve: add peripheral clock.
Jan 27 2025, 8:35 PM

Jan 22 2025

br updated the diff for D48575: riscv vmm: clean up SBI return code.

style: end of function return SUCCESS unless switch statement hit FAILURE

Jan 22 2025, 3:21 PM

Jan 21 2025

br added inline comments to D48532: riscv: Add driver for the cvitek restart controller.
Jan 21 2025, 10:46 PM
br added inline comments to D48441: riscv vmm: implement SBI RFNC.
Jan 21 2025, 3:23 PM
br requested review of D48575: riscv vmm: clean up SBI return code.
Jan 21 2025, 3:14 PM
br committed rG8f6b66a9d3f2: riscv vmm: implement SBI RFNC extension. (authored by br).
riscv vmm: implement SBI RFNC extension.
Jan 21 2025, 10:37 AM
br closed D48441: riscv vmm: implement SBI RFNC.
Jan 21 2025, 10:36 AM

Jan 20 2025

br added inline comments to D48534: riscv: Add the sdhci_fdt driver to the build.
Jan 20 2025, 7:18 PM
br added inline comments to D48532: riscv: Add driver for the cvitek restart controller.
Jan 20 2025, 7:11 PM

Jan 15 2025

br updated the diff for D40466: Hardware Trace (HWT) framework.

Resubmit updated patch

Jan 15 2025, 2:53 PM
br added inline comments to D40466: Hardware Trace (HWT) framework.
Jan 15 2025, 2:50 PM
br updated the diff for D40466: Hardware Trace (HWT) framework.
  • Remove $FreeBSD$ tags
  • Remove unused include headers
  • Check if HWT hooks are installed before constructing data structures
Jan 15 2025, 2:49 PM
br added inline comments to D48441: riscv vmm: implement SBI RFNC.
Jan 15 2025, 1:10 PM
br updated the diff for D48441: riscv vmm: implement SBI RFNC.

Address @jrtc27 and @markj comments (Thanks!)

Jan 15 2025, 1:10 PM

Jan 14 2025

br added inline comments to D48441: riscv vmm: implement SBI RFNC.
Jan 14 2025, 9:31 PM
br updated the diff for D48441: riscv vmm: implement SBI RFNC.

Address @markj comments

Jan 14 2025, 9:19 PM
br updated the diff for D40728: hwt(8) utility added.

Switch coresight to EL2 otherwise it does not trace CPU mode.

Jan 14 2025, 8:47 PM
br added a comment to D40466: Hardware Trace (HWT) framework.

How do you handle different conflicting modes? e.g. a user is tracing a pid & another tries to enable thread tracing. The hardware may not be able to perform both operations.

Jan 14 2025, 8:41 PM
br updated the diff for D40466: Hardware Trace (HWT) framework.

Prevent tracing the same proc by multiple users.

Jan 14 2025, 8:35 PM
br updated the summary of D40477: HWT: ARM CoreSight support.
Jan 14 2025, 8:25 PM
br added a comment to D40477: HWT: ARM CoreSight support.

This doesn't build when I add hwt and coresight to my kernel config

Jan 14 2025, 8:24 PM
br updated the diff for D40477: HWT: ARM CoreSight support.

Due to pipeline design Coresight components could not be used for more than 1 concurrent tracing sessions.
Atomic counter of sessions added and limited to 1.

Jan 14 2025, 8:22 PM

Jan 13 2025

br requested review of D48441: riscv vmm: implement SBI RFNC.
Jan 13 2025, 1:44 PM

Jan 2 2025

br accepted D48263: vmm.4: Update to mention non-amd64 platforms.
Jan 2 2025, 4:29 PM
br added inline comments to D48263: vmm.4: Update to mention non-amd64 platforms.
Jan 2 2025, 4:11 PM
br committed rG9be0058ea0fc: riscv vmm: virtual timer support. (authored by br).
riscv vmm: virtual timer support.
Jan 2 2025, 4:05 PM
br closed D48133: riscv vmm: SBI timer support.
Jan 2 2025, 4:05 PM

Dec 21 2024

br added inline comments to D47867: eswin pcie attachment driver.
Dec 21 2024, 10:52 PM

Dec 20 2024

br added inline comments to D47867: eswin pcie attachment driver.
Dec 20 2024, 3:29 PM

Dec 19 2024

br updated the diff for D47867: eswin pcie attachment driver.

Use delayed children attach.
It seems the PHY needs extra 500ms to initialize before we probe for devices. Otherwise PCIB could not find a device (Intel NVME in my case).
So instead of waiting for 500ms, postpone the bus enumeration.

Dec 19 2024, 5:48 PM

Dec 18 2024

br added a comment to D48133: riscv vmm: SBI timer support.

Wait so you put up a patch to disable Sstc before an alternative was provided?

Dec 18 2024, 4:20 PM
br requested review of D48133: riscv vmm: SBI timer support.
Dec 18 2024, 4:06 PM

Dec 17 2024

br committed rG4f5845126993: riscv: connect eswin to the build. (authored by br).
riscv: connect eswin to the build.
Dec 17 2024, 5:44 PM
br closed D48119: riscv: connect Eswin to the build.
Dec 17 2024, 5:44 PM
br updated the diff for D48119: riscv: connect Eswin to the build.

make reset driver optional
remove dtbs build

Dec 17 2024, 2:14 PM
br requested review of D48119: riscv: connect Eswin to the build.
Dec 17 2024, 2:10 PM
br committed rG56816e687557: riscv: Eswin hwreset support added. (authored by br).
riscv: Eswin hwreset support added.
Dec 17 2024, 11:47 AM
br closed D47853: eswin reset driver.
Dec 17 2024, 11:47 AM
br committed rG6766e8ceb5c6: riscv: Add SiFive CCache driver. (authored by br).
riscv: Add SiFive CCache driver.
Dec 17 2024, 11:29 AM
br closed D47831: sifive ccache driver.
Dec 17 2024, 11:29 AM
br committed rGa7bf553d175a: riscv vmm: add SSTC extension check. (authored by br).
riscv vmm: add SSTC extension check.
Dec 17 2024, 11:20 AM
br closed D48058: riscv vmm: add SSTC check.
Dec 17 2024, 11:20 AM

Dec 16 2024

br updated the diff for D48058: riscv vmm: add SSTC check.

remove extra retval check

Dec 16 2024, 5:24 PM
br updated the diff for D48058: riscv vmm: add SSTC check.

use snprintf() to ensure we don't overwrite buffer available

Dec 16 2024, 5:22 PM
br updated the diff for D47831: sifive ccache driver.

Per @mhorne suggestion, add device_get_unit() check;
Get virtual address of memory resource using rman_get_virtual().

Dec 16 2024, 5:15 PM
br updated the diff for D48058: riscv vmm: add SSTC check.

add const qualifier to char *isa

Dec 16 2024, 4:58 PM
br updated the diff for D48058: riscv vmm: add SSTC check.

Per @markj suggestion, construct the ISA string in the bhyve_init_platform() and then pass ready-to-use string to FDT code

Dec 16 2024, 4:42 PM

Dec 12 2024

br added a comment to D48058: riscv vmm: add SSTC check.

Do we really want one vm_cap_type entry per extension?

Dec 12 2024, 5:03 PM
br updated the diff for D48058: riscv vmm: add SSTC check.

Add missing context!

Dec 12 2024, 5:02 PM