These two are called MSR_LER_FROM_LIP and MSR_LER_TO_LIP in the Intel SDM, and their actual address varies from generation to generation. I wonder if we should remove them.

I can't find any reference to these in the Intel SDM. Some processor generations have MSR_LER_FROM_LIP and MSR_LER_TO_LIP at these addresses.

If they are variable, they should be removed IMO

I think these should be removed as well.

No, these are not alternate names for MSR_LER_*. The 'E' in LER stands for "exception", not "branch", so if anything MSR_LER* would be the ones you noted below with INT in their name (and it does kind of look like that).

The closest analog I can find in vol 4 from Sep 2023 are the MSR_LASTBRANCH_<0-N>_(FROM|TO)_IP which are two sets of N MRS.

In older generations, the FROM MSRs are a consecutive bank starting at 0x40, and the TO MSRs are a consecutive bank starting at 0x60, , and MSR_LASTBRANCH_TOS at 0x1c9. Some generations have N of 4 and some have N of 8.

Newer generations have a larger stack of these with FROM starting at 0x680 and TO starting at 0x6c0 (still have TOS at 0x1c9).

These values are similar to the Pentium 4 values (family 0xF) from my copy of vol 4 which have a MSR_LASTBRANCH_TOS at 0x1da followed by MSR_LASTBRANCH_<0-3> at 0x1db-0x1de. From the description of MSR_LASTBRANCH_0 there:

Last Branch Record 0 (R/O)
One of four last branch record registers on the
last branch record stack. It contains pointers to
the source and destination instruction for one
of the last four branches, exceptions, or
interrupts that the processor took.
MSR_LASTBRANCH_0 through
MSR_LASTBRANCH_3 at 1DBH-1DEH are
available only on family 0FH, models 0H-02H.
They have been replaced by the MSRs at 680H-
68FH and 6C0H-6CFH.

See Section 18.12, “Last Branch, Call Stack,
Interrupt, and Exception Recording for
Processors based on Skylake Microarchitecture."

However, in the table for "P6 family processors" (32-bit only Pentium II and Pentium III) we find all 4 of these exact values as named, and those are definitely not at all relevant to anything FreeBSD will run on in the future.

I'm fine if we drop these four, but in a separate review. If anyone really wants to implement branch tracing, then they can add constants/macros for the TOS and FROM/TO ranges for designs after the Pentium 4, but we can wait for that code to show up before adding any new constants I think. It's suspect the Intel PT stuff already obsoletes all this anyway.

See D60437