Set IO Sync Barrier flags for all Mbus devices on Armada38x
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#include <sys/cdefs.h>		#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");		__FBSDID("$FreeBSD$");

#include <sys/param.h>		#include <sys/param.h>
#include <sys/systm.h>		#include <sys/systm.h>
#include <sys/bus.h>		#include <sys/bus.h>

		#include <machine/fdt.h>

#include <arm/mv/mvwin.h>		#include <arm/mv/mvwin.h>
#include <arm/mv/mvreg.h>		#include <arm/mv/mvreg.h>
#include <arm/mv/mvvar.h>		#include <arm/mv/mvvar.h>

		int armada38x_win_set_iosync_barrier(void);

uint32_t		uint32_t
get_tclk(void)		get_tclk(void)
{		{
uint32_t sar;		uint32_t sar;

/*		/*
* On Armada38x TCLK can be configured to 250 MHz or 200 MHz.		* On Armada38x TCLK can be configured to 250 MHz or 200 MHz.
* Current setting is read from Sample At Reset register.		* Current setting is read from Sample At Reset register.
Show All 21 Lines	volatile uint32_t uart_sts = (uint32_t )(SOCDEV_VA + UART_REG_OFFSET +
UART_STS);		UART_STS);

while ((*uart_sts & UART_BUSY) == UART_BUSY)		while ((*uart_sts & UART_BUSY) == UART_BUSY)
;		;

*uart_thr = c;		*uart_thr = c;
}		}
early_putc_t *early_putc = armada38x_early_putc;		early_putc_t *early_putc = armada38x_early_putc;
#endif		#endif
		andrewUnsubmitted Done Inline Actions Missing newline andrew: Missing newline
		int
		armada38x_win_set_iosync_barrier(void)
		{
		bus_space_handle_t vaddr_iowind;
		int rv;

		rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE,
		MV_CPU_SUBSYS_REGS_LEN, 0, &vaddr_iowind);
		if (rv)
		return (rv);

		/* Set Sync Barrier flags for all Mbus internal units */
		bus_space_write_4(fdtbus_bs_tag, vaddr_iowind, MV_SYNC_BARRIER_CTRL,
		0xFFFF);
		andrewUnsubmitted Done Inline Actions Why 0xffff? andrew: Why 0xffff?

		bus_space_barrier(fdtbus_bs_tag, vaddr_iowind, 0,
		MV_CPU_SUBSYS_REGS_LEN, BUS_SPACE_BARRIER_WRITE);
		bus_space_unmap(fdtbus_bs_tag, vaddr_iowind, MV_CPU_SUBSYS_REGS_LEN);

		return (rv);
		}

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sys/arm/mv/mv_machdep.c

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sys/arm/mv/mvwin.h

	Show First 20 Lines • Show All 299 Lines • ▼ Show 20 Lines

	#define MV_PCIE_CONTROL (0x1a00)			#define MV_PCIE_CONTROL (0x1a00)
	#define MV_PCIE_ROOT_CMPLX (1 << 1)			#define MV_PCIE_ROOT_CMPLX (1 << 1)

	#define MV_WIN_SATA_CTRL(n) (0x10 * (n) + 0x30)			#define MV_WIN_SATA_CTRL(n) (0x10 * (n) + 0x30)
	#define MV_WIN_SATA_BASE(n) (0x10 * (n) + 0x34)			#define MV_WIN_SATA_BASE(n) (0x10 * (n) + 0x34)
	#define MV_WIN_SATA_MAX 4			#define MV_WIN_SATA_MAX 4

				#if defined(SOC_MV_ARMADA38X)
				#define MV_BOOTROM_MEM_ADDR 0xFFF00000
				#define MV_BOOTROM_WIN_SIZE 0xF
				#define MV_CPU_SUBSYS_REGS_LEN 0x100

				/* Internal Units Sync Barrier Control Register */
				#define MV_SYNC_BARRIER_CTRL 0x84
				#endif

	#define WIN_REG_IDX_RD(pre,reg,off,base) \			#define WIN_REG_IDX_RD(pre,reg,off,base) \
	static __inline uint32_t \			static __inline uint32_t \
	pre ## _ ## reg ## _read(int i) \			pre ## _ ## reg ## _read(int i) \
	{ \			{ \
	return (bus_space_read_4(fdtbus_bs_tag, base, off(i))); \			return (bus_space_read_4(fdtbus_bs_tag, base, off(i))); \
	}			}

	#define WIN_REG_IDX_RD2(pre,reg,off,base) \			#define WIN_REG_IDX_RD2(pre,reg,off,base) \
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Set IO Sync Barrier flags for all Mbus devices on Armada38x ClosedPublicActions

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Diff 10348

sys/arm/mv/armada38x/armada38x.c

sys/arm/mv/mv_machdep.c

sys/arm/mv/mvwin.h

Set IO Sync Barrier flags for all Mbus devices on Armada38x
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