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Allwinner USB DRD support (musb_otg)
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Authored by andrew on Apr 8 2016, 11:05 AM.
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Details

Summary

Allwinner USB DRD is based on the Mentor USB OTG controller, with a different register layout and a few missing registers.

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Repository
rS FreeBSD src repository - subversion
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Event Timeline

jmcneill retitled this revision from to Allwinner USB DRD support (musb_otg).
jmcneill updated this object.
jmcneill edited the test plan for this revision. (Show Details)
jmcneill added reviewers: ARM, hselasky.
jmcneill set the repository for this revision to rS FreeBSD src repository - subversion.
jmcneill added a project: ARM.
hselasky edited edge metadata.
hselasky added inline comments.
sys/arm/allwinner/aw_usbphy.c
173

Should the device_resume and device_suspend methods do anything?

179

I like better when you initialize by record:

driver = {
.name = "",
.xxxx
.size = ....
};

Current code is OK.

Same with other drivers in this patch.

This revision is now accepted and ready to land.Apr 8 2016, 12:07 PM
sys/dev/usb/controller/musb_otg.c
3146

(Why the extra parentheses?)

sys/dev/usb/controller/musb_otg.c
3146

Old code was like this, I only changed the indentation.

sys/arm/allwinner/aw_usbphy.c
173

Suspend/resume not yet supported on the Allwinner port.

179

Agree, but following style used in the rest of sys/arm/allwinner. Would it be alright if I changed musb_otg_allwinner.c to use C99 initializers and left awusbphy.c as-is?

jmcneill edited edge metadata.

Tweak the attach order of aw_usbphy and use c99 initializers in declaration of awusbdrd_driver

This revision now requires review to proceed.Apr 9 2016, 11:16 AM
This revision is now accepted and ready to land.Apr 9 2016, 7:36 PM

This is on hold due to an issue that showed up on Banana Pi testing. The board has two micro USB ports (OTG + power), and if the board is powered by the OTG port, configuring the PHY for host mode causes the board to reset. Ideally we will want to take ID and VBUS detect signaling into consideration (status which, depending on the board, is either read from GPIO pins, the AXP PMU, or both).

No news yet. The PHY driver has had some changes since this patch was last updated, so first I will need to merge with head.

andrew added a reviewer: jmcneill.
This revision now requires review to proceed.Feb 27 2018, 2:16 PM

Update to catch up with changed KPI and work on arm64 on the sopine.
This is untested on 32-bit arm.

It doesn't seem to quite work on the Allwinner A64. I'm getting the following when I try to use a wifi dongle:

...
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0001
musbotg_channel_alloc: No available channels. Mask: 0001
musbotg_channel_alloc: No available channels. Mask: 0001
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
musbotg_channel_alloc: No available channels. Mask: 0000
...

Handle missing CONFDATA register on some platforms

We don't have sc in awusbdrd_bs_r_1 to check

You need to ensure the chip actually supports the number of channels you specify.

Include D14783 to allow us to set our own endpoint config

sys/dev/usb/controller/musb_otg.h
432 ↗(On Diff #40535)

Spelling error? sc_eb_cfg -> sc_ep_cfg

sys/dev/usb/controller/musb_otg.h
432 ↗(On Diff #40535)

I've fixed it in D14783. I'll rebase this when that's been committed.

sys/dev/usb/controller/musb_otg_allwinner.c
70

s/allwinner_machdep/aw_machdep/

musb_otg.c part looks fine

This revision was not accepted when it landed; it landed in state Needs Review.Mar 23 2018, 11:09 AM
This revision was automatically updated to reflect the committed changes.

My problem was clock related (which I've fixed this weekend) and using latest u-boot which have usb problem ...
You probably didn't have the error as u-boot setup the clocks for you, now that we correctly set the clocks it's working.

This revision is now accepted and ready to land.Jun 25 2018, 5:15 AM

Any strong reason this is not in the tree yet?
Thanks!

In D5881#577758, @avg wrote:

Any strong reason this is not in the tree yet?
Thanks!

I don't think so, maybe there is a bit of stuff to do with regulator but if the driver still works that could be commited and we'll deal with regulator later.

Feel free to push upstream if the code has been tested.

This revision was automatically updated to reflect the committed changes.