User Details
- User Since
- Jan 7 2016, 3:15 PM (542 w, 5 d)
Wed, May 27
Mon, May 25
Fri, May 22
- fix build
- add support selecting atom c2000 processors and their weird register
- rename driver and export names to 'intel_rapl'
- fix modules build
Deduplicate, rearrange and add MSR for Atom C2000 power
Wed, May 13
Fri, May 8
Tue, May 5
Mon, May 4
May 1 2026
Apr 29 2026
Apr 28 2026
Handle ip block names being different on model 0x70 cpus
Apr 27 2026
Address review comments
Apr 24 2026
Apr 23 2026
Fix some build regressions and rebase
Apr 21 2026
Apr 20 2026
Add missing files highlighted by @jrm's stage-qa
Apr 15 2026
Thanks, I've updated the other review.
Apr 14 2026
Apr 9 2026
I said I would help Aymeric with this review, from a quick read it seems fine. I haven't thrown it at hardware and I'm not really that familiar with the TB/USB4 side of things.
Apr 2 2026
Remove PORTREVISION
Add full context diff
Mar 30 2026
Incorporate feedback from @jrm
Mar 20 2026
@jrm last time you generated the plist for me, but I don't remember how you got everything picked up correctly. Can you help?
Mar 18 2026
I think we should probably have tests check we do the correct things when we get a jumbogram. If these tests aren't run they don't really help with that.
Mar 16 2026
Feb 17 2026
Address review comments
Feb 13 2026
This looks ok, but I will have to admit that diff3 was always a bit of a mystery box. Please update the comment, but assuming tests don't start failing I'm willing to bet this is an improvement.
Feb 11 2026
Address review comments
Feb 10 2026
Feb 9 2026
remove sleeps
remove fifo configuration and delays
Feb 5 2026
Feb 4 2026
- correct NMM clock sizes to be 8 rather than 7 bits
Feb 2 2026
Jan 29 2026
Thanks for the heads up I'll update those too.
Jan 28 2026
Jan 27 2026
Jan 26 2026
- address review comments
Jan 23 2026
Rebase (well manually port) changes up to CURRENT from 7 years ago.