Looks good to me, thanks!

Add a simple check for the argument whether it matches only one option. In case of ambiguity return an error.

Rebase the revision.

Rebase the revision.

Do not return immediately in case TRUST ANCHORS are NULL, as openpgp may be supported as well.

Fix style issues.

Match args with shortest prefix. Add help message and prevent from running with invalid path.

The driver doesn't use Programmable Clock Mode because it does not converges to the SDHCI standard here.
In case of ls1028 the generic code (even with the added support) won't switch to PCM considering it unsupported... Obviously, we can switch to PCM on our own, but all that logic must be performed in additional function like fsl_sdhc_fdt_set_clock. IMHO that is not the case to rewrite the function to use PCM.
Divided Clock Mode can be used without any additional helper functions, but then divider 3 is unavailable - we won't get 600/3=200MHz for HS200. DCM is inapplicable.

We still need to apply a limited clock division errata. Basically in HS400 mode and that mode only the controller can only use a limited set of divisors. I will try to modify the generic code to support Programmable Clock Mode and test it against ls1028 whether HS400 mode works correctly with or without errata application. Then we could possibly get rid of the problematic sdhci_fsl_fdt_set_clock function, and possibly apply the errata in some other, less invasive way.

There are still some conditions under which this patch is valid and necessary. On ls1028a the base clock is 600MHz, therefore to obtain 200MHz frequency for HS200 we need divider 3. As SDHCI standard does not support odd dividers, this patch allows to use them. With this, we can use 200MHz instead of 150MHz for HS200 for faster transfers.
As it comes to the SDHCI_CLOCK_CONTROL register, it is captured properly in sdhci_fsl_fdt_read_2 function - we read controller register responsible for clock stability indicator and set flag if matched. I can't see any other invalid usages of aforementioned.

Abandon this revision as retuning is handled in https://reviews.freebsd.org/D34027 patch, which covers all cases and fixes.

Change voltage switching logic. After setting registers check for errata flag for missing regulator and use syscon register for voltage switch if necessary. Check for a fixed regulator presence afterwards, as it still might be possible and use it.

Fix typos. Don't return from function right after voltage switching with a syscon, but go to the fixed regulator logic.

Rebase patch on HEAD.

Rebase patch on HEAD.

Rebase patch on HEAD.

Rebase on HEAD

Update commit log with differential information.

Apparently LX2160A requires window pointer errata enabled for tuning to succeed. (SDHCI_FSL_TUNING_ERRATUM_TYPE2)
Unfortunately on this SoC we have a generic compat string for SDHCI driver, so there is no easy way to detect and apply it.
For now, I will prepare a patch that disables HS200/HS400 modes for all boards that use the generic compat.

Remove redundant variable.

Update commit log. Add helper function for polling registers. Fix typos and remove redundant variables declaration.

Update commit log.

Update commit log.

Fix typo in commit log: s/LS1028A/LS1012A.

Change time period in license entry from 2021 to 2020 - 2021.

Change function's names to more self-descriptive, reflecting followed ARM instructions behavior.

Remove conversion helper function, as it is separate commit.

Move signed -> unsigned helper function to libkern.h.

Split driver into two separate drivers, each for north bridge or south bridge domain.

Rebase against main

Rebase against main

Rebase against main

Added back neta entry in sys/arm64/conf/std.marvell.