Differential D42291

riscv: Remove unnecessary invalidations in pmap_enter_quick_locked()
ClosedPublic
Actions

Authored by markj on Oct 19 2023, 1:08 PM.

Tags

None

Referenced Files

	Unknown Object (File)
	Wed, Aug 19, 10:34 PM

	Unknown Object (File)
	Tue, Aug 18, 6:46 AM

	Unknown Object (File)
	Wed, Aug 12, 4:49 PM

	Unknown Object (File)
	Mon, Aug 10, 6:19 AM

	Unknown Object (File)
	Sun, Aug 9, 6:14 PM

	Unknown Object (File)
	Sun, Aug 9, 3:03 PM

	Unknown Object (File)
	Sun, Aug 9, 2:59 PM

	Unknown Object (File)
	Sun, Aug 9, 2:55 PM

Subscribers

Details

Reviewers

alc
kib
jhb

Commits

rGd246ba035960: riscv: Remove unnecessary invalidations in pmap_enter_quick_locked()
rG71b77a7172c2: riscv: Remove unnecessary invalidations in pmap_enter_quick_locked()

Summary

This function always overwrites an invalid PTE, so if
pmap_try_insert_pv_entry() fails it is certainly not necessary to
invalidate anything, because the PTE has not yet been written by that
point.

It should also not be necessary to invalidate TLBs after overwriting an
invalid entry. In principle the TLB could cache negative entries, but
then the worst case scenario is a spurious fault. Since pmap_enter()
does not bother issuing an sfence.vma, pmap_enter_quick_locked() should
behave similarly.

Diff Detail

Repository

rG FreeBSD src repository

Lint

Lint Skipped

Unit

Tests Skipped

Build Status

Buildable 54083
Build 50973: arc lint + arc unit

Event Timeline

markj created this revision.Oct 19 2023, 1:08 PM

Herald added subscribers: riscv, imp. · View Herald TranscriptOct 19 2023, 1:08 PM

markj requested review of this revision.Oct 19 2023, 1:08 PM

Harbormaster completed remote builds in B54083: Diff 129083.Oct 19 2023, 1:08 PM

markj added a parent revision: D42290: riscv: Port improvements from arm64/amd64 pmaps, part 3.Oct 19 2023, 1:08 PM

So RISC-V can cache -ve PTEs?

kib accepted this revision.Oct 20 2023, 5:14 PM

kib added inline comments.

sys/riscv/riscv/pmap.c
3465	BTW, return (NULL) there would be more clear
3479	And there

This revision is now accepted and ready to land.Oct 20 2023, 5:14 PM

In D42291#965582, @kib wrote:

So RISC-V can cache -ve PTEs?

Yes, and the spec explicitly calls this out.

Simplify some return paths.

This revision now requires review to proceed.Oct 20 2023, 5:44 PM

Harbormaster completed remote builds in B54115: Diff 129171.Oct 20 2023, 5:44 PM

kib accepted this revision.Oct 20 2023, 5:49 PM

This revision is now accepted and ready to land.Oct 20 2023, 5:49 PM

Closed by commit rG71b77a7172c2: riscv: Remove unnecessary invalidations in pmap_enter_quick_locked() (authored by markj). · Explain WhyNov 2 2023, 6:48 PM

This revision was automatically updated to reflect the committed changes.

markj added a commit: rG71b77a7172c2: riscv: Remove unnecessary invalidations in pmap_enter_quick_locked().

markj added a commit: rGd246ba035960: riscv: Remove unnecessary invalidations in pmap_enter_quick_locked().Dec 2 2023, 9:56 PM

Revision Contents
Changeset List

Path

Size

sys/

riscv/

riscv/

5 lines

Diff 129083

sys/riscv/riscv/pmap.c

Loading...