amd64: add pcb_tlsbase

[kib]

Summary

This is a value for TLS base that would be explicitly set by user.
It is forced into the fsbase register on entry to signal handler, making
TLS in the handler usable even if userspace uses segmentation.

Tested by: pho

[olce]

Seems fine, except for one thing, please see inline comment.

sys/amd64/amd64/exec_machdep.c

212–213

Shouldn't we set pcb_gsbase on SV_ILP32 instead?

[kib]

sys/amd64/amd64/exec_machdep.c

212–213

There is no problem with 32bit apps at all in this regard. Simple reload of %gs on the signal handler entry gives the right base, because 32bit GDT/LDT already must have correct base.

Problem with fsbase in long mode is that the reload of the segment is not enough, and we do not know what is the right fsbase, without userspace explicitly telling us. This is the difference between AMD64_SET_FSBASE and AMD64_SET_TLSBASE.

That said, sendsig() does not delvier signals to i386 processes, this is done by ia32_sendsig(), so SV_ILP32 must not be set there anyway.

[olce]

sys/amd64/amd64/exec_machdep.c

212–213

Ah yes, forgot that there's no base problem for 32-bit apps. (I appreciate the difference between AMD64_SET_FSBASE and AMD64_SET_TLSBASE.)

I was not aware there was as sv_sendsig field in struct sysentvec. Indeed, ia32_sendsig(). So, setting PCB_TLSBASE even for a 32-bit process in cpu_set_user_tls() is not needed, but doesn't hurt either.

[kib]

There seems to be no more interest to the review.
Peter, could you, please run the stress2 set, all amd64 and threading tests are relevant?

[pho]

In D50482#1153552, @kib wrote:

There seems to be no more interest to the review.
Peter, could you, please run the stress2 set, all amd64 and threading tests are relevant?

Sure, happy to.