vfs_busy(): Update the description of mount crossing

[olce]

Summary

Describe the new protocol and hint at the functions to use to cross mounts.

[olce]

Update after latest changes in the stack.

sys/kern/vfs_subr.c

  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 
 /**
  *      Cortex-A7, Cortex-A15, ARMv8 and later Generic Timer
  */
 
+#include "opt_acpi.h"
+#include "opt_platform.h"
+
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/bus.h>
 #include <sys/kernel.h>
 #include <sys/module.h>
 #include <sys/malloc.h>
 #include <sys/rman.h>
 #include <sys/timeet.h>
 #include <sys/timetc.h>
 #include <sys/watchdog.h>
 #include <machine/bus.h>
 #include <machine/cpu.h>
 #include <machine/intr.h>
 
+#ifdef FDT
 #include <dev/fdt/fdt_common.h>
 #include <dev/ofw/openfirm.h>
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
+#endif
 
-#include <machine/bus.h>
+#ifdef DEV_ACPI
+#include <contrib/dev/acpica/include/acpi.h>
+#include <dev/acpica/acpivar.h>
+#endif
 
 #define GT_CTRL_ENABLE          (1 << 0)
 #define GT_CTRL_INT_MASK        (1 << 1)
 #define GT_CTRL_INT_STAT        (1 << 2)
 #define GT_REG_CTRL             0
 #define GT_REG_TVAL             1
 
 #define GT_CNTKCTL_PL0PTEN      (1 << 9) /* PL0 Physical timer reg access */
arm_tmr_intr(void *arg)
         }
 
         if (sc->et.et_active)
                 sc->et.et_event_cb(&sc->et, sc->et.et_arg);
 
         return (FILTER_HANDLED);
 }
 
+#ifdef FDT
 static int
-arm_tmr_probe(device_t dev)
+arm_tmr_fdt_probe(device_t dev)
 {
 
         if (!ofw_bus_status_okay(dev))
                 return (ENXIO);
 
         if (ofw_bus_is_compatible(dev, "arm,armv7-timer")) {
                 device_set_desc(dev, "ARMv7 Generic Timer");
                 return (BUS_PROBE_DEFAULT);
         } else if (ofw_bus_is_compatible(dev, "arm,armv8-timer")) {
                 device_set_desc(dev, "ARMv8 Generic Timer");
                 return (BUS_PROBE_DEFAULT);
         }
 
         return (ENXIO);
 }
+#endif
 
+#ifdef DEV_ACPI
+static void
+arm_tmr_acpi_identify(driver_t *driver, device_t parent)
+{
+        ACPI_TABLE_GTDT *gtdt;
+        vm_paddr_t physaddr;
+        device_t dev;
 
+        physaddr = acpi_find_table(ACPI_SIG_GTDT);
+        if (physaddr == 0)
+                return;
+
+        gtdt = acpi_map_table(physaddr, ACPI_SIG_GTDT);
+        if (gtdt == NULL) {
+                device_printf(parent, "gic: Unable to map the GTDT\n");
+                return;
+        }
+
+        dev = BUS_ADD_CHILD(parent, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE,
+            "generic_timer", -1);
+        if (dev == NULL) {
+                device_printf(parent, "add gic child failed\n");
+                goto out;
+        }
+
+        BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 0,
+            gtdt->SecureEl1Interrupt, 1);
+        BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 1,
+            gtdt->NonSecureEl1Interrupt, 1);
+        BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 2,
+            gtdt->VirtualTimerInterrupt, 1);
+
+out:
+        acpi_unmap_table(gtdt);
+}
+
 static int
+arm_tmr_acpi_probe(device_t dev)
+{
+
+        if (device_get_unit(dev) != 0)
+                return (ENXIO);
+
+        if (acpi_get_type(dev) != ACPI_TYPE_NOT_FOUND)
+                return (ENXIO);
+
+        device_set_desc(dev, "ARM Generic Timer");
+        return (BUS_PROBE_DEFAULT);
+}
+#endif
+
+
+static int
 arm_tmr_attach(device_t dev)
 {
         struct arm_tmr_softc *sc;
+#ifdef FDT
         phandle_t node;
         pcell_t clock;
+#endif
         int error;
         int i;
 
         sc = device_get_softc(dev);
         if (arm_tmr_sc)
                 return (ENXIO);
 
+#ifdef FDT
         /* Get the base clock frequency */
         node = ofw_bus_get_node(dev);
-        error = OF_getprop(node, "clock-frequency", &clock, sizeof(clock));
+        if (node > 0) {
+                error = OF_getprop(node, "clock-frequency", &clock,
+                    sizeof(clock));
                 if (error > 0) {
                         sc->clkfreq = fdt32_to_cpu(clock);
                 }
+        }
+#endif
 
         if (sc->clkfreq == 0) {
                 /* Try to get clock frequency from timer */
                 sc->clkfreq = get_freq();
         }
 
         if (sc->clkfreq == 0) {
                 device_printf(dev, "No clock frequency specified\n");
#endif
         sc->et.et_start = arm_tmr_start;
         sc->et.et_stop = arm_tmr_stop;
         sc->et.et_priv = sc;
         et_register(&sc->et);
 
         return (0);
 }
 
-static device_method_t arm_tmr_methods[] = {
-        DEVMETHOD(device_probe,                arm_tmr_probe),
+#ifdef FDT
+static device_method_t arm_tmr_fdt_methods[] = {
+        DEVMETHOD(device_probe,         arm_tmr_fdt_probe),
         DEVMETHOD(device_attach,        arm_tmr_attach),
         { 0, 0 }
 };
 
-static driver_t arm_tmr_driver = {
+static driver_t arm_tmr_fdt_driver = {
         "generic_timer",
-        arm_tmr_methods,
+        arm_tmr_fdt_methods,
         sizeof(struct arm_tmr_softc),
 };
 
-static devclass_t arm_tmr_devclass;
+static devclass_t arm_tmr_fdt_devclass;
 
-EARLY_DRIVER_MODULE(timer, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0,
-    BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
-EARLY_DRIVER_MODULE(timer, ofwbus, arm_tmr_driver, arm_tmr_devclass, 0, 0,
-    BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
+EARLY_DRIVER_MODULE(timer, simplebus, arm_tmr_fdt_driver, arm_tmr_fdt_devclass,
+    0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
+EARLY_DRIVER_MODULE(timer, ofwbus, arm_tmr_fdt_driver, arm_tmr_fdt_devclass,
+    0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
+#endif
+
+#ifdef DEV_ACPI
+static device_method_t arm_tmr_acpi_methods[] = {
+        DEVMETHOD(device_identify,      arm_tmr_acpi_identify),
+        DEVMETHOD(device_probe,         arm_tmr_acpi_probe),
+        DEVMETHOD(device_attach,        arm_tmr_attach),
+        { 0, 0 }
+};
+
+static driver_t arm_tmr_acpi_driver = {
+        "generic_timer",
+        arm_tmr_acpi_methods,
+        sizeof(struct arm_tmr_softc),
+};
+
+static devclass_t arm_tmr_acpi_devclass;
+
+EARLY_DRIVER_MODULE(timer, acpi, arm_tmr_acpi_driver, arm_tmr_acpi_devclass,
+    0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
+#endif
 
 void
 DELAY(int usec)
 {
         int32_t counts, counts_per_usec;
         uint32_t first, last;
 
         /*