mvebu_gpio: fix gpio pin configuration update

[mw]

Summary

The GPIO pins have single corresponding bits in the
configuration registers. Hitherto accessor was
writing entire word with SYSCON_WRITE_4 instead of
doing a proper update with SYSCON_MODIFY_4.
Moreover the used mask had incorrect value.

Fix both issues and add the helper routine
gpio_pin_modify for accessing affected registers.

[mmel]

write is expected (moreover these are WO ->thus not suitable for SYSCON_MODIFY operation).

sys/arm/mv/mvebu_gpio.c

164

No, this change is wrong. GPIO have their own register for setting or clearing pin direction. Full register write is right at this place.

256

ditto.

293

ditto

[mw]

Confirmed with the specs and agree. Updating.

[mw]

@mmel you can commit this patch, it's basically your change. I only want it to be in the tree :)