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arm64: Don't rely on firmware interrupt mapping in ICU
Needs ReviewPublic

Authored by mindal_semihalf.com on Fri, Feb 19, 7:42 PM.

Details

Reviewers
mw
mmel
manu
Summary

When allocating an interrupt that is routed through the CP110 we need to create a mapping between it and the parent interrupt controller.
Before this patch we relied on it being done in firmware.
This worked with EDK2 and older versions of u-boot, but in the newer ones the mapping is no longer done there.
With this patch irq number is allocated in GICP/SEI and passed down to ICU which does the mapping.
This allows us to boot on armada 7k/8k boards that run modern uboot.

For SATA interrupts we need to apply a WA previously done in firmware.
We have two SATA ports connected to one controller. Each ports gets its own interrupt, but only one of them is
described in dts, also ahci_generic driver expects only one irq per controller.
Fix it by mapping both CP110 interrupts when one of them is allocated.
This way the same irq is triggered in GICP when either port fires an interrupt.

In the case of SEI we have two types of interrupts - ones that are directly connected to AP806 and others that are routed through CP110.
The former require 1:1 mapping, the latter are handled in the same way as interrupts in GICP.

Test Plan

Boot macchiatobin, verify that all basic components that use ICU interrupts work. (MMC/USB/SATA)

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