riscv: T-HEAD PBMT support
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Authored by mhorne on Jun 3 2024, 6:51 PM.

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Reviewers

markj
br
jrtc27
jhb

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riscv

Commits

rGccbe9a9f732e: riscv: T-HEAD PBMT support

Summary

T-HEAD CPUs provide a spec-violating implementation of page-based memory
types, using PTE bits [63:59]. Add basic support for this "errata",
referred to in some places as an "extension".

Note that this change is not enough on its own, but a workaround is
needed for the bootstrap (locore) page tables as well.

Diff Detail

Repository

rG FreeBSD src repository

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Event Timeline

mhorne created this revision.Jun 3 2024, 6:51 PM

Herald added a subscriber: imp. · View Herald TranscriptJun 3 2024, 6:51 PM

mhorne requested review of this revision.Jun 3 2024, 6:51 PM

Harbormaster completed remote builds in B58037: Diff 139385.Jun 3 2024, 6:51 PM

mhorne added a parent revision: D45471: riscv: Svpbmt extension support.Jun 3 2024, 6:51 PM

mhorne added a reviewer: jhb.Jun 3 2024, 6:52 PM

jhb added inline comments.Jun 6 2024, 4:42 PM

sys/riscv/include/pte.h
111–114	Is there no attribute for cacheable RAM, or should one of the labels here (PMA) use cacheable in the description?
sys/riscv/riscv/pmap.c
4878	If you pull memattr_mask down into the prior commit, I think you can just use it directly in this function instead of the local `mask` temporary?

Update according to C910 specification.

Tested on hardware (Allwinner D1), with workarounds applied, which boots until
late device probing.

Harbormaster completed remote builds in B58379: Diff 140316.Jun 27 2024, 6:39 PM

mhorne added inline comments.Jun 27 2024, 6:48 PM

sys/riscv/include/pte.h
126–129	For some reason I was getting strange (incorrect) bitmasks with the previous version. This is not final but it works...
sys/riscv/riscv/pmap.c
4878	Eventually, this function might be expanded to support changing the page protection bits as well, see `pmap_change_props_locked()` on amd64. In this case `mask` and `bits` will apply to more than the memory attributes. Therefore I think it is fine to leave it as is.