reg-io-width option for UART drivers

[br]

Summary

allow setting access width for UART registers

This is required for FDT's standard "reg-io-width" property (similar too "reg-shift" property)

This fixes operation for Altera Arria 10 development kit, where standard ns8250 uart allows 4-byte access only.

[br]

use static inline funcs for uart_setreg, uart_getreg and consider reg-io-width == 2

[kan]

No objections.

[marcel]

sys/dev/uart/uart_core.c

494 ↗

(On Diff #25748)

I'm ok with the change, but with yet another parameter that ends up in the uart_bas structure, I wonder if it isn't about time we simply pass a uart_bas structure instead.

Such would make future changes (are there any left to expect?) a lot easier as well.

[jchandra]

I had a different solution of a similar issue for Netlogic XLP. Instead of handling it in UART, I had subclassed the simplebus with a updated implementation of bus_alloc_resource(https://svnweb.freebsd.org/base/head/sys/mips/nlm/xlp_simplebus.c). I provided a different bustag for UART (and other devices) that needed 4-byte access that implementation. The bus implementation took care of reading 4 bytes and extracting and returning the significant byte.

Thought I would mention it, I don't have any objection to this way of doing it either.