pcib: Only apply ARI translation to a bridge's own secondary bus

[ojanerif_amd.com]

Summary

ARI changes RID interpretation only for the device on a downstream
port's secondary bus. pcib_xlate_ari() applied that translation to
every config access through an ARI-enabled bridge, including cycles
forwarded to a subordinate bus.

A non-zero slot on a subordinate bus then panics an INVARIANTS kernel
and is misrouted otherwise. Translate only when the access targets
this bridge's secondary bus.

Sponsored by: AMD

[jhb]

This looks correct to me. Tagging folks from the original commit (55d3ea1731d10) as well.