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msun/riscv: expose fe{disable,enable}except
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Authored by brooks on Mar 12 2024, 10:47 PM.
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Details

Summary

This is required for GCC to build. Play the Tier-2 card and don't care
about ABI disruption on soft-float, especially since we don't provide
such a target arch any more.

PR: 272759
Reported by: dgilbert@eicat.ca
Submitted by: jrtc27

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rG FreeBSD src repository
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By ABI break you mean for riscv64sf getting the old symbol versions? That architecture is dead, we should just delete the dead code in the header.

By ABI break you mean for riscv64sf getting the old symbol versions? That architecture is dead, we should just delete the dead code in the header.

OK, I'll do that is a separate commit.

This revision was not accepted when it landed; it landed in state Needs Review.Mar 21 2024, 11:50 PM
This revision was automatically updated to reflect the committed changes.