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mmel (Michal Meloun)
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Feb 3 2015, 4:54 AM (537 w, 1 d)

Recent Activity

Wed, May 14

mmel accepted D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.

Thanks

Wed, May 14, 6:26 PM
mmel added inline comments to D50309: subr_devmap: Implement pmap_mapdev with pmap_mapdev_attr.
Wed, May 14, 11:52 AM

Mon, May 12

mmel added a comment to D50307: arm: Make the pmap_kenter signature like arm64.

I'm sorry, I wanted to send it to D50309.

Mon, May 12, 8:14 PM
mmel added a comment to D50307: arm: Make the pmap_kenter signature like arm64.

Very briefly, I think this clashes with devmap_add_entry(), which is used on armv7 to reduce the TLB load. The pmap_mapdev_attr() function does not respect the required attributes for pages previously mapped by devmap_add_entry(). Imho, we don't have a method for changing page attributes on multiple mapped pages in an architecturally correct way. (And I'm afraid this is true for arm64 , for pages mapped by DMAP and also in some other way).

Mon, May 12, 8:09 PM

Sun, May 4

mmel committed rGec5083a0e890: rk_iodomain: Do not require optional FDT properties. (authored by mmel).
rk_iodomain: Do not require optional FDT properties.
Sun, May 4, 5:10 PM
mmel committed rG50fda38ba0b0: libgcc_s: export integer and floating point __aeabi_ symbols (authored by mmel).
libgcc_s: export integer and floating point __aeabi_ symbols
Sun, May 4, 5:10 PM
mmel committed rG71279c158005: rk3568 pcie: Do not require optional FDT properties. (authored by mmel).
rk3568 pcie: Do not require optional FDT properties.
Sun, May 4, 5:10 PM
mmel closed D50101: rk_iodomain: Do not require optional FDT properties.
Sun, May 4, 5:10 PM
mmel committed rG9ee759f3676f: Decorate IPv4 structures used for byte buffer overlays as packed. (authored by mmel).
Decorate IPv4 structures used for byte buffer overlays as packed.
Sun, May 4, 5:10 PM
mmel closed D50100: libgcc_s: export integer and floating point __aeabi_ symbols .
Sun, May 4, 5:10 PM
mmel closed D50102: rk3568 pcie: Do not require optional FDT properties..
Sun, May 4, 5:10 PM
mmel closed D50103: netinet: Decorate IPv4 structures used for byte buffer overlays as packed..
Sun, May 4, 5:10 PM
mmel added a comment to D50100: libgcc_s: export integer and floating point __aeabi_ symbols .

I plan to MFC it, sure. I just forgot to copy all tag lines into the review.

Sun, May 4, 11:10 AM

Sat, May 3

mmel committed rGbec5167645b5: arm: Improve the creation of kernel.bin (authored by mmel).
arm: Improve the creation of kernel.bin
Sat, May 3, 10:09 AM
mmel committed rG0aca1d4e7c76: arm: remove accidentally added -Map switch to linker (authored by mmel).
arm: remove accidentally added -Map switch to linker
Sat, May 3, 10:09 AM

Thu, May 1

mmel added a comment to D50103: netinet: Decorate IPv4 structures used for byte buffer overlays as packed..

I disagree, __packed resets the alignment to 1, so __attribute__((aligned(x))) can increase it. Imho, internally, __packed does nothing but reset the alignment of all members to 1 . Everything else (padding, size) is derived from that.
see: https://developer.arm.com/documentation/dui0472/m/Compiler-specific-Features/--attribute----packed---variable-attribute

Thu, May 1, 11:20 AM
mmel added a comment to D50100: libgcc_s: export integer and floating point __aeabi_ symbols .

They are all softfloat - all aeabi functions use softfloat calling convections and compiler-rt implementation doesn't use VFP. I removed the optimized VFP variants from the build (because they needed support in the RT linker). Imho these floating point functions are only used for softfloat binaries and also for Thumb-1 code.

Thu, May 1, 10:43 AM
mmel added a comment to D50103: netinet: Decorate IPv4 structures used for byte buffer overlays as packed..

I think that packed attribute also forces the object to be aligned to 1, so it begins conform with the C language rules. I think this is the only way to reduce the alignment of an object -> attribute__((packed, aligned(x)))

Thu, May 1, 9:40 AM
mmel requested review of D50103: netinet: Decorate IPv4 structures used for byte buffer overlays as packed..
Thu, May 1, 9:08 AM
mmel requested review of D50102: rk3568 pcie: Do not require optional FDT properties..
Thu, May 1, 8:49 AM
mmel requested review of D50101: rk_iodomain: Do not require optional FDT properties.
Thu, May 1, 8:44 AM
mmel requested review of D50100: libgcc_s: export integer and floating point __aeabi_ symbols .
Thu, May 1, 8:27 AM
mmel accepted D50083: Make sure the memory region definitions are zeroed before use..

imho, using two temporary ulong variables for function calls and assigning them to mem_region members gives the compiler a chance to complain. But both versions are OK for me.
And my apology for not committed this fix in time...
Michal

Thu, May 1, 7:19 AM

Apr 3 2025

mmel added a comment to D49655: kern: add an extres-style power domain framework.

How will multiple devices inside a single power domain be handled?

Apr 3 2025, 4:36 PM
mmel added a comment to D49655: kern: add an extres-style power domain framework.

I really didn't want to force you to revert it. And it's just my problem that I didn't notice it at the right time. I just wanted to pass on this (perhaps obvious) information to someone else who is less sclerotic than me, that's all. Mostly because I've been super lazy lately, so no one can expect anything from me that just a few words.

Apr 3 2025, 4:30 PM
mmel accepted D49655: kern: add an extres-style power domain framework.

LGTM. Just note that the newly added OF_device_unregister_xref() function does not work as expected without some sort of reference couting. A single device can (and do it in many cases) provide multiple functions (for example - pinmux, gpio, and interrupt controller), so is registered using respective frameworks 3x...

Apr 3 2025, 2:40 PM

Mar 12 2025

mmel added inline comments to D49265: arm: Use the counter in the early arm64 DELAY.
Mar 12 2025, 5:39 PM
mmel added inline comments to D49265: arm: Use the counter in the early arm64 DELAY.
Mar 12 2025, 6:54 AM

Mar 4 2025

mmel added a comment to D47514: riscv: enable allwinner RTC.

Unfortunately, the assumption about "In all the devices we currently support, the clock names in the "clock-output-names" property" is clearly incorrect. The documented binding for the A10/A20 does not allow any of these clocks. so this breaks every single A10/A20 board...

Mar 4 2025, 12:33 PM

Dec 8 2024

mmel committed rGabed528a9726: arm: align data section to the supersection. (authored by mmel).
arm: align data section to the supersection.
Dec 8 2024, 1:39 PM
mmel committed rGa9956e87506f: arm: add read_frequently, read_mostly and exclusive_cache_line sections to… (authored by mmel).
arm: add read_frequently, read_mostly and exclusive_cache_line sections to…
Dec 8 2024, 1:39 PM
mmel committed rGb9d95dc51a21: arm: fix symbols around the .ARM.exidx section (authored by mmel).
arm: fix symbols around the .ARM.exidx section
Dec 8 2024, 1:39 PM
mmel committed rGb66e0c51005a: arm: Fix typo in ldscript.arm. (authored by mmel).
arm: Fix typo in ldscript.arm.
Dec 8 2024, 1:39 PM
mmel committed rGd94ff663b6a6: arm: Fix VFP state corruption during signal delivery (authored by mmel).
arm: Fix VFP state corruption during signal delivery
Dec 8 2024, 1:39 PM
mmel committed rG52c00b65a76e: arm: switch the BUSDMA buffers to normal uncached memory (authored by mmel).
arm: switch the BUSDMA buffers to normal uncached memory
Dec 8 2024, 1:39 PM
mmel committed rG83ad268f7e0e: arm: align data section to the supersection. (authored by mmel).
arm: align data section to the supersection.
Dec 8 2024, 1:39 PM
mmel committed rGd321b707d6a9: arm: add read_frequently, read_mostly and exclusive_cache_line sections to… (authored by mmel).
arm: add read_frequently, read_mostly and exclusive_cache_line sections to…
Dec 8 2024, 1:38 PM
mmel committed rGc159be9a0a73: arm: fix symbols around the .ARM.exidx section (authored by mmel).
arm: fix symbols around the .ARM.exidx section
Dec 8 2024, 1:38 PM
mmel committed rGdf890fef1dcf: arm: Fix typo in ldscript.arm. (authored by mmel).
arm: Fix typo in ldscript.arm.
Dec 8 2024, 1:38 PM
mmel committed rG60799897ea89: arm: switch the BUSDMA buffers to normal uncached memory (authored by mmel).
arm: switch the BUSDMA buffers to normal uncached memory
Dec 8 2024, 1:38 PM

Nov 30 2024

mmel accepted D47848: genassym: Remove stale *if.h depends.
Nov 30 2024, 12:24 PM
mmel accepted D47847: arm: Use constants from sys/intr.h, not genassym.
Nov 30 2024, 12:24 PM
mmel accepted D47846: sys/intr.h: Make it safe to include from assembler.
Nov 30 2024, 12:23 PM

Nov 26 2024

mmel committed rG3abef90c325d: arm: Fix VFP state corruption during signal delivery (authored by mmel).
arm: Fix VFP state corruption during signal delivery
Nov 26 2024, 11:20 AM

Nov 24 2024

mmel added inline comments to D38696: arm: Unbreak debugging programs that use FP instructions.
Nov 24 2024, 12:01 PM
mmel added inline comments to D38698: arm: Fix initialization of VFP context.
Nov 24 2024, 11:55 AM
mmel added inline comments to D37419: arm: Add support for using VFP in kernel.
Nov 24 2024, 11:52 AM

Nov 17 2024

mmel committed rGb882d21558f3: arm: link all .rodata variants into one output section (authored by mmel).
arm: link all .rodata variants into one output section
Nov 17 2024, 11:37 AM
mmel committed rG60e72eb16a08: arm: align data section to the supersection. (authored by mmel).
arm: align data section to the supersection.
Nov 17 2024, 11:09 AM
mmel committed rGd98a18d032e6: arm: add read_frequently, read_mostly and exclusive_cache_line sections to… (authored by mmel).
arm: add read_frequently, read_mostly and exclusive_cache_line sections to…
Nov 17 2024, 11:09 AM
mmel committed rG1701dfae1be3: arm: fix symbols around the .ARM.exidx section (authored by mmel).
arm: fix symbols around the .ARM.exidx section
Nov 17 2024, 11:09 AM
mmel committed rG0381f0b63b9a: arm: Fix typo in ldscript.arm. (authored by mmel).
arm: Fix typo in ldscript.arm.
Nov 17 2024, 11:08 AM

Nov 11 2024

mmel committed rG248109448f6a: arm: switch the BUSDMA buffers to normal uncached memory (authored by mmel).
arm: switch the BUSDMA buffers to normal uncached memory
Nov 11 2024, 8:23 AM
mmel closed D47485: arm: switch the BUSDMA buffers to normal uncached memory.
Nov 11 2024, 8:23 AM

Nov 9 2024

mmel committed rG0283eebb4a54: arm: remove accidentally added -Map switch to linker (authored by mmel).
arm: remove accidentally added -Map switch to linker
Nov 9 2024, 7:32 AM
mmel committed rGba045ba49ded: arm: Improve the creation of kernel.bin (authored by mmel).
arm: Improve the creation of kernel.bin
Nov 9 2024, 7:17 AM
mmel closed D47488: arm: Improve the creation of kernel.bin.
Nov 9 2024, 7:16 AM

Nov 8 2024

mmel requested review of D47488: arm: Improve the creation of kernel.bin.
Nov 8 2024, 4:48 PM
mmel requested review of D47485: arm: switch the BUSDMA buffers to normal uncached memory.
Nov 8 2024, 12:17 PM

Oct 26 2024

mmel added a comment to D47279: intrng: address post-commit review feedback.

@mmel I also find it odd that you were the first to suggest an enum.

That's a misunderstanding. It seems I was too brief and probably inaccurate. I apologize for that.
I always meant to say that INTR_TYPE should not be a #define with bitfield-like values, but with enum-like values.
Given my aversion to having enum in interfaces, it didn't occur to me at all that someone might take that as a recommendation to use enum. My bad, I'll try not to repeat it next time.

Oct 26 2024, 7:36 AM

Oct 25 2024

mmel added a comment to D47283: arm64: Use the common activate function in nexus.

+1 for deduplication

Oct 25 2024, 5:10 PM
mmel added a comment to D47279: intrng: address post-commit review feedback.

And we also don't compile the kernel with -fno-short-enums. So the actual behavior/variant depends only on the compiler (for which both variants are equally valid).
What happens when someone uses this enum as a member of KABI compliant structure?

They get the same as any other enum in a structure? There are plenty already out there, and unless you start to reach 128 enum values there is no risk of the type changing by adding one.

???? The enum (with less than 128 values) size changes with the default compiler settings.

Well, yours is sparse. In the case of intr_root_type it's not, it's required to be contiguous from 0, so it must hit 128 distinct root types (SCHAR_MAX + 1) to potentially change.

No, sizeof(enum) with < 128 values is 4 (with -fno-short-enums) or 1 (with -fshort-enums).

Oct 25 2024, 5:01 PM
mmel added a comment to D47279: intrng: address post-commit review feedback.

And we also don't compile the kernel with -fno-short-enums. So the actual behavior/variant depends only on the compiler (for which both variants are equally valid).
What happens when someone uses this enum as a member of KABI compliant structure?

They get the same as any other enum in a structure? There are plenty already out there, and unless you start to reach 128 enum values there is no risk of the type changing by adding one.

Oct 25 2024, 4:12 PM
mmel added a comment to D47279: intrng: address post-commit review feedback.

And we also don't compile the kernel with -fno-short-enums. So the actual behavior/variant depends only on the compiler (for which both variants are equally valid).
What happens when someone uses this enum as a member of KABI compliant structure?

Oct 25 2024, 3:41 PM
mmel added a comment to D47279: intrng: address post-commit review feedback.

This code

Oct 25 2024, 3:18 PM
mmel added a comment to D47279: intrng: address post-commit review feedback.

ohh, sorry, taking back this part. I noticed u_register_t in the original commit and missed the subsequent change.
But my complaint about enum) being a low-level interface remains. if I'm not mistaken, the enum size is not fixed which is not a good feature for the interface.
You cannot assume sizeof(MyEnum) == sizeof(int) in general. see

Oct 25 2024, 5:39 AM
mmel added a comment to D47279: intrng: address post-commit review feedback.

imho the original commit is wrong and should be reverted. Enum is clearly not the right type of variable for a low-level interface, especially if it should be used in assembler. A direct consequence of this problem is that the patch uses two different types (enum and u_register_t) for the same variable.

Oct 25 2024, 4:37 AM

Oct 23 2024

mmel accepted D46816: arm64: Don't enable interrupts when in a spinlock.
Oct 23 2024, 6:58 PM

Oct 8 2024

mmel accepted D47002: sys/intr.h: formally depend on machine/intr.h.
Oct 8 2024, 1:47 PM

Oct 4 2024

mmel added a comment to D46816: arm64: Don't enable interrupts when in a spinlock.

imho, arm32 has slightly more correct code/condition, see|: https://cgit.freebsd.org/src/tree/sys/arm/arm/trap-v6.c#n403

Oct 4 2024, 7:24 AM

Sep 16 2024

mmel added inline comments to D46662: imx clk: Skip reconfiguring the clock if we don't have a new best_parent.
Sep 16 2024, 5:02 PM

Aug 1 2024

mmel committed rG72a1920e73d1: arm: Add evdev to the TEGRA124 config (authored by markj).
arm: Add evdev to the TEGRA124 config
Aug 1 2024, 9:28 AM

Jul 31 2024

mmel committed rGfb084dd01e25: Fix mismerge in lib/libthr/arch/riscv/include/pthread_md.h (authored by mmel).
Fix mismerge in lib/libthr/arch/riscv/include/pthread_md.h
Jul 31 2024, 6:28 PM
mmel committed rG8ca43e674e3c: gdtoa: Regenerate configuration headers for 32-bit arm. (authored by mmel).
gdtoa: Regenerate configuration headers for 32-bit arm.
Jul 31 2024, 5:24 PM
mmel committed rG30863065e50d: libthr: Preresolve selected EABI symbols on arm. (authored by mmel).
libthr: Preresolve selected EABI symbols on arm.
Jul 31 2024, 5:24 PM
mmel committed rGbd774d7aa111: libthr: Preresolve selected EABI symbols on arm. (authored by mmel).
libthr: Preresolve selected EABI symbols on arm.
Jul 31 2024, 5:24 PM

Jul 26 2024

mmel added a comment to D46159: arm64: Expand the use of Armv8.1-A atomics.

While it probably does not directly apply to this case, we should be very careful with similar constructions.
Clang is slightly schizophrenic and declare minimal common list of extension if -march is passed to the compiler, but maximal list of extensions (including optional ones) if -mcpu is passed to the compiler.
See https://github.com/llvm/llvm-project/issues/90365.
To my eyes this is a bug, nothing else.

Jul 26 2024, 4:44 PM

Jul 25 2024

mmel committed rG5670b8cc3672: libthr: Preresolve selected EABI symbols on arm. (authored by mmel).
libthr: Preresolve selected EABI symbols on arm.
Jul 25 2024, 4:25 PM
mmel closed D46104: libthr: Preresolve selected EABI symbols on arm.
Jul 25 2024, 4:25 PM
mmel updated the diff for D46104: libthr: Preresolve selected EABI symbols on arm.

Adapted to kib's objections.

Jul 25 2024, 8:13 AM

Jul 24 2024

mmel requested review of D46104: libthr: Preresolve selected EABI symbols on arm.
Jul 24 2024, 5:31 PM

Jun 20 2024

mmel accepted D45634: armv6: Remove support for building armv6.
Jun 20 2024, 4:21 PM

Jun 19 2024

mmel added inline comments to D45634: armv6: Remove support for building armv6.
Jun 19 2024, 5:43 PM

Jun 13 2024

mmel requested changes to D40474: intrng: call pic_init_secondary on all registered PICs.

I've written this several times in other reviews, I think. Initialization of PICs on secondary cores must be coordinated with the parent PIC and must follow the PIC hierarchy. Imho, the only way to do this correctly is implement this in pic_init_secondary() for each PIC driver.

Jun 13 2024, 5:12 AM

Jun 9 2024

mmel accepted D33804: Remove the arm FIQ support.
Jun 9 2024, 3:29 PM

May 17 2024

Herald added a reviewer for D36754: arm atomic-v6.h: Use eoreqs rather than eorseq to appease GNU as.: andrew.

Hmm, shouldn't the -masm-syntax-unified be added to gcc CFLAGS? (just guessing, untested)

May 17 2024, 5:19 PM

Jan 23 2024

mmel added a comment to D40474: intrng: call pic_init_secondary on all registered PICs.

I think it's the wrong way. The initiation of child PICs is the job of the parent PIC and must be done in right order and in coordination with the parent PIC. Please see D43452 for more details.

Jan 23 2024, 8:17 AM
mmel added a comment to D35899: intrng: Allow alternative IPI PICs to be registered and used.

However, these new IPIs still generate interrupts/exceptions - so some form of more or less abstract PIC is still needed. Of course, if these instructions have evolved into a fixed part of the CPU (that is, the IPI will be generated by the exact instruction and raise an exact exception), we can hardcode it and omit it from INTRNQ...

Jan 23 2024, 8:10 AM
mmel accepted D35898: intrng: Extract arm/arm64 IPI->PIC glue code.
Jan 23 2024, 7:08 AM
mmel accepted D35897: intrng: Remove irq_root_ipicount and corresponding intr_pic_claim_root arg.
Jan 23 2024, 6:23 AM

Jan 17 2024

mmel accepted D43479: arm64: fix db_read_bytes() for size == 8.

Thanks fixing my bugs..

Jan 17 2024, 5:17 PM

Dec 29 2023

mmel added a comment to D43229: tegra210: use UTF-8, not ISO-8859.

Maximum PLL lock time is 20 microsecond. Alternatively, we may use the 'us' to avoid UTF-8 in source files.

Dec 29 2023, 7:20 AM
mmel accepted D43229: tegra210: use UTF-8, not ISO-8859.
Dec 29 2023, 7:11 AM

Sep 24 2023

mmel added a comment to D41565: arm: Add a userspace physical timer check.

I'm afraid that using virtual time outside the hypervisor environment is somewhat problematic, or creates a new (not always fulfilled) dependency on firmware. The virtual timer uses the value stored in CNTVOFF as an offset to generate the timer value. CNTVOFF is stored in a bank with an undefined reset value, so it *MUST* be initialized, otherwise we can end up with a situation where each core will have a different, non-zero value - so each core will have a different time. So the actual code expects someone (firmware, hypervisor) to initialize CNTVOFF on all cores - which is not always true (or better said, it is uncommon in the ARMv7 world and guaranteed in ARM64 ).

Sep 24 2023, 7:17 AM

Sep 23 2023

mmel added a comment to D41946: Add support for host32 for DIRDEPS_BUILD.

This broke (at least) armv7 cross-buildworld on amd64.

Sep 23 2023, 5:50 PM

Sep 14 2023

mmel added a comment to D40161: arm64/intrng: add support for FIQs.

I certainly don't want to block your work. I just don't want to introduce new KPIs that are problematic ( at least for me) for further expansion , nothing else.

Sep 14 2023, 7:28 PM
mmel added a comment to D40161: arm64/intrng: add support for FIQs.

I see. So if I assume that the full implementation should have multiple roots (per type). My main objection is about using bitfield for interrupt type. Is misleading, not much compatible with multiple root implementation and it allows only single bit value almost everywhere.

Sep 14 2023, 9:42 AM

Sep 13 2023

mmel added a comment to D40161: arm64/intrng: add support for FIQs.

The problem is that the FIQ tree may have a different topology than a normal interrupts. So instead of passing flags to the root handler, we should create a new root for the FIQ tree (or for any other type of interrupt), including a new intr_pic_claim_root_<foo>() (or we can convert intr_irq_root_dev and irq_root_* to arrays or so...).

Sep 13 2023, 3:04 AM

Sep 8 2023

mmel accepted D41762: cpufreq_dt: Find the closest frequency.
Sep 8 2023, 5:00 AM
mmel accepted D41767: kern: Globally define abs64.
Sep 8 2023, 5:00 AM