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- User Since
- Nov 9 2019, 6:03 PM (260 w, 6 d)
Jan 21 2023
Jan 15 2023
Jan 9 2023
This is perhaps the point where I am getting confused. How could vcpu2 be in vcpu_lock_all()? Rather, vcpu_lock_all() is executed by some thread which is performing ioctl op on behalf of the userspace counterpart. In other words, the look at code suggests that vcpu_lock_all()/vcpu_lock_one() are never called from a context which represents running vcpu thread.
Jan 8 2023
No, because
- vcpu 1 can be waiting for rendezvous completion;
- vcpu 2 can be in vcpu_lock_all trying to lock vcpu 1 (and won't therefore perform the rendezvous for vcpu 2)
I found I still have the same problem where, for m < n,
- vCPU m requests rendezvous and executes its own rendezvous func
- thread for vCPU n tries to obtain lock_all
- thread for vCPU n gets stalled waiting for vCPU m to go to idle state and, since m < n, it never reaches vCPU n
- it can perform the rendezvous for vCPU m, but that's already complete
- vCPU m is waiting for vCPU n to do its rendezvous.
Figured out what bool vm_handle_rendezvous_help_one(struct vcpu *vcpu) it must be -- but nope, with sufficient CPUs I still get a deadlock. This time I have
- vcpu == 0 has invoked its rendezvous func but is spinning waiting for the rest of the rendezvous to complete;
- thread 10 in vcpu_set_state_locked() waiting for the lock on vcpu 0. The rendezvous for vcpu 0 is already complete, so it just spins -- as before.
- all other cpus have completed their rendezvous and are waiting for vcpu 10 to do its rendezvous.
Jan 7 2023
Do you have the implementation of bool vm_handle_rendezvous_help_one() ? It didn't make it into this patch.
Unfortunately I see the same behaviour with the patch. (Though I had to make some small tweaks to backport the patch to 13/Stable.)
I think the problem is that the vCPU needing help is not the vCPU that is contending on the lock.
Apr 13 2021
Apr 12 2021
This problem went away after I updated uefi-edk2-bhyve from 0.2_1,1 to g20210214,2
Apr 10 2021
Urgh, I realised my handling of the high 64 bit BAR is incorrect.
Oct 19 2020
Oct 11 2020
Oct 4 2020
Updated as per comments.
Sep 11 2020
- Re-express comments, rename constant, limit segsize also.
Sep 7 2020
- Fix comments.
Sep 6 2020
Jul 25 2020
Updated as per comments.
Jul 19 2020
Jul 7 2020
Add additional comments to explain the probe.
Jul 4 2020
- bcm2838_pci.c: fix one type.
My bad, I didn't test this on a 32 bit platform. I fixed some types to use the right type (pci_addr_t instead of bus_addr_t) and checked it builds on armv7 and aarch64.
- bcm2838_pci.c: fix some types for armv7.
Jun 28 2020
Any volunteers for a committer?
Jun 22 2020
Updated per comments and to handle changes made in pci_host_generic.c.
Jun 21 2020
This is now inconsistent with pci_host_generic_core_alloc_resource(). It seems to me that you are using the rman to manage PCI bus addresses, then trying to allocate CPU addresses out of that. When those ranges do not overlap, the allocation always fails.
Thank you.
Jun 20 2020
James Mintram <me@jamesrm.com> reworked the patch I wrote after some email discussion. Submitting his updates on top.
Updated per review, sent to me by James Mintram <me@jamesrm.com>.
Is there a process to follow to get this change from "accepted" to committed?
Jun 15 2020
Jun 14 2020
- if_genet: rename MIIF_RXID, MIIF_TXID.
Jun 13 2020
@andrew Now that I have an 8 GB Pi4 I realise I need to change the dma mapping to ensure that DMA is only performed in the lower 3 GB of the physical address space (this is a hardware limitation of the controller). The bus_dma_tag_create() call is right in the guts of pci_host_generic_core_attach(). Any thoughts on the best way to thread this through?
- if_genet: remove MIFF_DOPAUSE mode.
I am not an expert by any means but these changes look good to me.
Jun 6 2020
Why not make it part of the pcib_interface?
Jun 1 2020
May 30 2020
Jan 18 2020
Thanks for reviewing this.
Jan 3 2020
- vmm: Accesses to guest_counters pointer itself need not be atomic.