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Differential D5720

Move to 4 level page tables
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Authored by andrew on Mar 23 2016, 4:01 PM.
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Details

Reviewers
kib
Group Reviewers
arm64
Commits
rS297446: Add support for 4 level pagetables. The userland address space has been
Summary

This adds support for 4 level pagetables. To help this it adds two functions
to find the lowest table level, and lowest block/page level. It is expected
this will be useful later to support superpages.

The kernel address space has been kept identical for now, however I epxect
to move memory around later to support a larger DMAP region.

This patch is mostly extending the existing code to use the extra level.
It's not quire ready to be committed, there are a few bits in locore.S that
still need a cleanup, but the other parts are ready for feedback.

Test Plan

I've run stress2 tests on the ThunderX in the Sentex cluster.
I don't think the issues I'm seeing there are due to the patch.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Build Status
Buildable 3058
Build 3090: arc lint + arc unit

Event Timeline

andrew updated this revision to Diff 14551.Mar 23 2016, 4:01 PM
andrew retitled this revision from to Move to 4 level page tables.
andrew updated this object.
andrew edited the test plan for this revision. (Show Details)
andrew added reviewers: arm64, kib.
andrew added a subscriber: emaste.
Herald added a subscriber: imp. · View Herald TranscriptMar 23 2016, 4:01 PM
andrew added inline comments.Mar 23 2016, 4:04 PM
sys/arm64/arm64/locore.S
90–94

This comment needs to be fixed

448–473

This was used early on, it's probably unneeded now if we stick with a 48-bit address space.

andrew added inline comments.Mar 23 2016, 4:08 PM
sys/arm64/arm64/vm_machdep.c
86–87

Should rename, it's not a l1 address anymore.

andrew updated this revision to Diff 14709.Mar 29 2016, 11:54 AM
  • Finish locore.S
  • Rename pcb_l1addr
kib added inline comments.Mar 30 2016, 10:39 AM
sys/arm64/arm64/locore.S
619

Is this comment still valid ?

sys/arm64/arm64/pmap.c
921

Assert that the pte type is correct, for non-NULL pte ? Same for two more functions below.

1329

deadc0de/deadbeef is spiffy, but vm_page_alloc() does not look at the value for NULL object. It might be slightly faster to use zero.

1404

Why use literal 9 there ? Isn't it something like L0SHIFT - L1SHIFT ?

andrew marked an inline comment as done.Mar 30 2016, 10:50 AM
andrew added inline comments.
sys/arm64/arm64/pmap.c
921

What do you mean by pte type? pmap_pte will only return an entry that contains a page or block map. Both of these are the final level and will point at the physical address for the given virtual address.

The comment above is now stale & will be updated.

kib added inline comments.Mar 30 2016, 11:22 AM
sys/arm64/arm64/pmap.c
921

I mean the value of two lowest bits in the pte. Basically, what you said in the first sentence of your reply, expressed as an assert.

andrew updated this revision to Diff 14734.Mar 30 2016, 12:43 PM

Update based on feedback from @kib

andrew updated this revision to Diff 14735.Mar 30 2016, 12:51 PM

Fix format strings so it builds (still need to test)

andrew updated this revision to Diff 14736.Mar 30 2016, 1:03 PM

I changed link_l1_pagetable when it should have been link_l0_pagetable, fix this
Tested on qemu

andrew marked 8 inline comments as done.Mar 30 2016, 1:06 PM
kib accepted this revision.Mar 30 2016, 1:21 PM
kib edited edge metadata.

BTW, I suspect that pv_global_lock is not needed on arm64 at all. On amd64 it is still required because we have to issue IPIs for invalidation and delay them as much as possible. With the synchronous and coherent TLB invalidation I _think_ that the issues which are prevented right now by pv_global_lock on amd64, cannot happen on arm64.

This revision is now accepted and ready to land.Mar 30 2016, 1:21 PM
Closed by commit rS297446: Add support for 4 level pagetables. The userland address space has been (authored by andrew). · Explain WhyMar 31 2016, 11:07 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

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arm64/
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Diff 14709

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sys/arm64/arm64/genassym.c

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sys/arm64/arm64/locore.S

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sys/arm64/arm64/machdep.c

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sys/arm64/arm64/minidump_machdep.c

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sys/arm64/arm64/pmap.c

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sys/arm64/arm64/swtch.S

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sys/arm64/arm64/vm_machdep.c

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sys/arm64/include/machdep.h

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sys/arm64/include/pcb.h

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sys/arm64/include/pmap.h

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sys/arm64/include/pte.h

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sys/arm64/include/vmparam.h

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