Differential D36453

Add ARMADA38X clkgen driver
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Authored by aja_semihalf.com on Sep 5 2022, 1:57 PM.

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wma
mw
manu
kd
mmel
bz

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rG07c5be33f145: Add ARMADA38X clkgen driver

Summary

This patch introduces clkgen driver for Armada38x SoCs. Clock topology consists of single coreclk which supplies clock signal to CPU cores and peripherials.

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Event Timeline

aja_semihalf.com created this revision.Sep 5 2022, 1:57 PM

Herald added a subscriber: andrew. · View Herald TranscriptSep 5 2022, 1:57 PM

aja_semihalf.com requested review of this revision.Sep 5 2022, 1:57 PM

manu added inline comments.Sep 6 2022, 7:14 AM

sys/arm/mv/clk/armada38x_coreclk.c
88	No coreclk_1 ? Also what is the point of base and offset ? They doesn't seems to be used here.
sys/arm/mv/files.arm7
38	Would be best to not make them optional.

aja_semihalf.com updated this revision to Diff 110182.Sep 6 2022, 8:30 AM

aja_semihalf.com added inline comments.Sep 6 2022, 8:35 AM

sys/arm/mv/clk/armada38x_coreclk.c
88	DTS refers to coreclk 0 and coreclk 2 and i wanted to follow that.

manu accepted this revision.Sep 6 2022, 9:35 AM

This revision is now accepted and ready to land.Sep 6 2022, 9:35 AM

Closed by commit rG07c5be33f145: Add ARMADA38X clkgen driver (authored by aja_semihalf.com, committed by kd). · Explain WhySep 7 2022, 8:00 AM

This revision was automatically updated to reflect the committed changes.

kd added a commit: rG07c5be33f145: Add ARMADA38X clkgen driver.

Herald added a subscriber: imp. · View Herald TranscriptSep 7 2022, 8:00 AM

Revision Contents
Changeset List

Path

Size

sys/

arm/

mv/

clk/

armada38x_coreclk.c

222 lines

armada38x_gen.h

40 lines

armada38x_gen.c

100 lines

3 lines

Diff 110182

sys/arm/mv/clk/armada38x_coreclk.c

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sys/arm/mv/clk/armada38x_gen.h

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sys/arm/mv/clk/armada38x_gen.c

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sys/arm/mv/files.arm7

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