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Add support for SPI-mapped MSI interrupts in GICv3
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Authored by mst_semihalf.com on Aug 26 2016, 4:21 PM.
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Details

Summary

PIC_SETUP_INTR implementation in GICv3 did not allow for setting up interrupts without included FDT description. GICv2m-like MSI interrupts, which map MSI messages to SPI interrupt lines, may not have a description in FDT.
Add support for such interrupts by setting the trigger and polarity to the appropriate values for MSI (edge, high) and get the hardware IRQ number from the corresponding ISRC.

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rS FreeBSD src repository - subversion
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mst_semihalf.com retitled this revision from to Add support for SPI-mapped MSI-X interrupts in GICv3.
mst_semihalf.com updated this object.
mst_semihalf.com edited the test plan for this revision. (Show Details)
mst_semihalf.com added reviewers: zbb, imp, ian, wma.
mst_semihalf.com set the repository for this revision to rS FreeBSD src repository - subversion.
mst_semihalf.com added a subscriber: arm64.
mst_semihalf.com retitled this revision from Add support for SPI-mapped MSI-X interrupts in GICv3 to Add support for SPI-mapped MSI interrupts in GICv3.Aug 29 2016, 7:21 PM
mst_semihalf.com updated this object.
wma edited edge metadata.
This revision is now accepted and ready to land.Sep 5 2016, 8:46 AM
mst_semihalf.com edited edge metadata.

Move the code to a separate function gic_map_msi() similarly to D7698.

This revision now requires review to proceed.Sep 8 2016, 7:21 PM
This revision was automatically updated to reflect the committed changes.