PIC_SETUP_INTR implementation in GICv3 did not allow for setting up interrupts without included FDT description. GICv2m-like MSI interrupts, which map MSI messages to SPI interrupt lines, may not have a description in FDT.
Add support for such interrupts by setting the trigger and polarity to the appropriate values for MSI (edge, high) and get the hardware IRQ number from the corresponding ISRC.
Details
Details
- Reviewers
zbb wma imp • ian - Commits
- rS306069: Add support for SPI-mapped MSI interrupts in GICv3.
Diff Detail
Diff Detail
- Repository
- rS FreeBSD src repository - subversion
- Lint
Lint Not Applicable - Unit
Tests Not Applicable