hwpmc: keep AMD UMC counters from saturating

[ojanerif_amd.com]

Summary

UMC counters saturate at 2^48 instead of wrapping, after about a day
and a half of memory clock cycles. Reset the counter on a read once
bit 47 is set and keep the count in a per-CPU base.

Sponsored by: AMD
Signed-off-by: Osvaldo Janeri Filho <[e-mail]>

[mhorne]

This new array allocation is not necessary.

Instead, each PMC object has a private per-CPU state: pm->pcpu[cpu] (struct pmc_pcpu_state). You should use the pps_overflow member of this structure; see how it is handled in hwpmc_armv7.c and hwpmc_arm64.c.