arm64: Update GICv3/4 register macros

[andrew]

Summary

Use the field names found in the documentation and drop _EL1 where
appropriate. This will reduce the diff when these are generated from
the BSD licensed JSON register files.

Sponsored by: Arm Ltd

[kajetan.puchalski_arm.com]

sys/arm64/include/armreg.h

819

Are we sure about dropping _EL1_ from here? EOIMode as a field only exists in ICC_CTLR_EL1 as far as I can tell.

822

Similarly, we only have ICC_IAR0_EL1 and ICC_IAR1_EL1. If the special INTID 1023 is shared between Group 0 and Group 1 interrupts, would this not be more aptly named something like ICC_IAR_EL1_SPUR?

824–828

Both of these registers only have an EL1 variant so same as above

859–860

This field exists in _EL1, _EL2 and _EL3 so the change makes sense, but maybe it'd be good to update the comment as well?

[andrew]

For historic reasons register fields accessed via an EL1 register name we don't include _EL1. For EL2 registers we do as otherwise the name may not be unique.

[kajetan.puchalski_arm.com]

In D59182#1366757, @andrew wrote:

For historic reasons register fields accessed via an EL1 register name we don't include _EL1. For EL2 registers we do as otherwise the name may not be unique.

Fair enough, that makes sense. What about the SPUR value being applicable to both Group 0 and Group 1?