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amdgpio, gpiobus: Add interrupt support for !INTRNG platforms
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Authored by rz_fabmicro.ru on Jun 30 2026, 5:53 PM.
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Details

Summary

This commit is based on work done by Andriy Gapon initially
submmitted in D26407 back in 2020. The idea was to add internal PIC
controller to serve GPIO interrupts to attached bus client (child),
new flag IE_BUS_PRIV is introduced to mark interrupts internal to the
bus. The code has been adopted to build with recent kernel source.

It was observed that after client event handler is removed (module
unloaded), a stray interrupt may appear because handler is scheduled
for execution one last time to let it remove itself. The sometimes
delayed handler then consequently calls to pre_ and post_ithread which
unmasks interrupts on no longer used GPIO pin.
A workaround added to prevent such stray interrupts, see extended
comment in gpiopic_remove_handler().

Test Plan

Tested on AMD Ryzen 5 based laptops: HP-15s and Lenovo Ideapad Gaming
with gpioaei.ko (Power Button connected to GPIO pin 0).

Diff Detail

Repository
rG FreeBSD src repository
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Build Status
Buildable 77100
Build 73983: arc lint + arc unit

Event Timeline

adrian added a subscriber: adrian.

most of this is fine but the code that handles the non-intrng path seems .. a lot. I think I want this eyeballed by some other folks and see if there's scope to just push to get everything migrated to intrng already.

Last time I checked, porting x86 to intrng did not look trivial, at least for me.
Maybe it would not be too hard for someone with more experience in both.

Another idea that I had was to have gpiobus-with-interrupts as a sub-class of gpiobus.
Just to minimize changes to the core gpiobus and to split the code a little bit.

For reference, here's bug report I posted some time ago which made me deep-dive into this problem. It seems, as reduced ACPI hardware laptops (with Power buttons served by GPIO pin) become more frequent, we will have to solve this GPIO interrupts issue either way.

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=295251

rz_fabmicro.ru edited the test plan for this revision. (Show Details)

Fix bitwise operations while calculating 64-bit constant AMD_GPIO_INTR_MASK

A 32-bit constant "1u" is used to calculate 64-bit value which produces
erroneous 32-bit value where 64-bit value is expected. Change constant
to "1ul" which is 64-bit long.