Import the Hardware Counters (HWC) Framework

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Summary

This is a lightweight hook-less framework for user space counting.

It doesn't attempt to do many of the both useful and generalisable things that hwpmc(4) does -- no sampling mode, no symbol resolution, etc -- so it's not a substitute in a general way to hwpmc(4).

For the things we're measuring in CHERI Project, the cost of context switching registers may be higher than the cost of what we are measuring.
In our benchmark workloads, we're interested in end-to-end resource use, so we often do want to include other expenses on the core into the results.

No virtualisation so one program at a time drives all counters use across the whole system. This also does nothing about interrupts.

This has to be run with cpuset(1) to ensure we configure counters, run program, and read results on the same core. The system also had to be idling to ensure the core does not take unrelated to the benchmark workloads.

This includes RISC-V SBI PMU driver.

Obtained from: CheriBSD

Test Plan

Example output

root@cheribsd-riscv64-purecap-std093:~ # cpuset -l 0 /home/br/hwc -f /home/br/hwc-x730 /bin/sleep 1
      time == 311377698159
      cycle == 311378056151
      instructions == 9678241097
   3: Capability (XLEN*2-1 width) Load committed == 780158
   4: Capability (XLEN*2-1 width) Store committed == 240565
   5: Capability (XLEN*2-1 width) Atomic committed == 0
   6: Any instruction committed in Capability Pointer Mode == 2788555

Example config:

# 
# Codasip X730 event id table.
# Counter IDs available: 3 to 6.
# 
mhpmcounters {
        mhpmcounter = {
                id = 3;
                name = 'RISC-V Exception taken';
                event_id = 0x001;
                enabled = false;
        }
        mhpmcounter = {
                id = 4;
                name = 'CHERI Exception taken (distinguished by mcause=0x1c)';
                event_id = 0x002;
                enabled = false;
        }

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remove unused functions/prototypes