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arm64: tidy up Top-Byte-Ignore (TBI) in the kernel
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Authored by andrew on Feb 24 2025, 10:29 AM.
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Details

Summary

In preparation for TBI to be enabled for processes from 15.0 we need
to clean up copying data between userspace and the kernel. These
functions will check the address is within the valid userspace range,
however as the userspace and kernel ranges may overlap when TBI is
enabled we need to mask off the top 8 bits.

Processes not using TBI are unaffected as the hardware will still
check all bits in the address, however this will happen at the first
load/store instruction.

Sponsored by: Arm Ltd

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andrew added inline comments.
sys/arm64/arm64/copyinout.S
35

Why is this needed?

sys/arm64/arm64/locore.S
948–949 ↗(On Diff #151395)

I think we should wait before enabling this as we need to handle data aborts with a non-zero top byte, and decide if enabling TBI is an ABI change or not.

At least for Intel, enabling LAM is the ABI change. I believe all our tier-1 platforms must be measured by the same standard.

andrew edited reviewers, added: harry.moulton_arm.com; removed: andrew.
andrew retitled this revision from arm64: tidy up and enable top-byte-ignore (TBI) in the kernel to arm64: tidy up Top-Byte-Ignore (TBI) in the kernel.
andrew edited the summary of this revision. (Show Details)

Only handle copyin/out/etc
Will keep Harry as Author

This revision was not accepted when it landed; it landed in state Needs Review.Aug 6 2025, 5:38 PM
This revision was automatically updated to reflect the committed changes.